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ST7LUS5 データシート(PDF) 101 Page - STMicroelectronics |
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ST7LUS5 データシート(HTML) 101 Page - STMicroelectronics |
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101 / 124 page ![]() ST7LUS5, ST7LU05, ST7LU09 Electrical characteristics 101/124 Designing hardened software to avoid noise problems EMC characterization and optimization are performed at component level with a typical application environment and simplified MCU software. It should be noted that good EMC performance is highly dependent on the user application and the software in particular. Therefore it is recommended that the user applies EMC software optimization and prequalification tests in relation with the EMC level requested for his application. Software recommendations: The software flowchart must include the management of runaway conditions such as: ● Corrupted program counter ● Unexpected reset ● Critical Data corruption (control registers...) Prequalification trials: Most of the common failures (unexpected reset and program counter corruption) can be reproduced by manually forcing a low state on the RESET pin or the oscillator pins for 1 second. To complete these trials, ESD stress can be applied directly on the device, over the range of specification values. When unexpected behavior is detected, the software can be hardened to prevent unrecoverable errors occurring (see application note AN1015). Table 75. EMS test results Symbol Parameter Conditions Level/ Class VFESD Voltage limits to be applied on any I/O pin to induce a functional disturbance VDD = 5V, TA = +25°C, fOSC = 8 MHz, SO8 package, conforms to IEC 1000-4-2 3B VFFTB Fast transient voltage burst limits to be applied through 100pF on VDD and VDD pins to induce a functional disturbance VDD =5V, TA = +25°C, fOSC =8MHz, SO8 package, conforms to IEC 1000-4-4 4A |
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