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AD9397/PCB データシート(PDF) 15 Page - Analog Devices

部品番号 AD9397/PCB
部品情報  DVI Display Interface
PDF  28 Pages
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メーカー  AD [Analog Devices]
ホームページ  http://www.analog.com
Logo AD - Analog Devices

AD9397/PCB データシート(HTML) 15 Page - Analog Devices

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AD9397
Rev. 0 | Page 15 of 28
Hex
Address
Read/Write
or Read Only
Bits
Default
Value
Register Name
Description
0x28
Read/Write
:2]
11000**
S Delay
ets the delay (in lines) from the VSYNC leading edge to the start
[7
0
V
S
of active video.
[1:0]
******01
HS Delay MSB
29.
MSB, Register 0x
0x29
Read/Write
els) from the HSYNC leading edge to the
[7:0]
00000100
HS Delay
Sets the delay (in pix
start of active video.
0x2A
Read/Write
[3:0]
****0101
Line Width MSB
MSB, Register 0x2B.
0x2B
Read/Write
[7:0]
00000000
Line Width
Sets the width of the active video line in pixels.
0x2C
Read/Write
[3:0]
****0010
Screen Height MSB
MSB, Register 0x2D.
0x2D
Read/Write
[7:0]
11010000
Screen Height
Sets the height of the active screen in lines.
0x2E
Read/Write
[7]
0*******
Test 1
Must be written to 1 for proper operation.
0x2F
Read
[6]
*0******
TMDS Sync Detect
Detects a TMDS DE.
[5]
**0*****
TMDS Active
Detects a TMDS clock.
[3]
****0***
HDCP Keys Read
EEPROM keys is successful.
Returns 1 when read of
[2:0]
*****000
DVI Quality
Returns quality number based on DE edges.
0x30
Read
se (content is
d.
ar
[6]
*0******
DVI Content
Encrypted
This bit is high when HDCP decryption is in u
protected). The signal goes low when HDCP is not being use
Customers can use this bit to determine whether to allow
copying of the content. The bit should be sampled at regul
intervals because it can change on a frame-by-frame basis.
[5]
**0*****
DVI HSYNC Polarity
Returns DVI HSYNC polarity.
[4]
***0****
DVI VSYNC Polarity
Returns DVI VSYNC polarity.
0x31
Read/Write
]
nc pulse width for Macrovision
[7:4
1001****
MV Pulse Max
Sets the maximum pseudo sy
detection.
[3:0]
****0110
MV Pulse Min
nimum pseudo sync pulse width for Macrovision®
Sets the mi
detection.
0x32
Read/Write
[7]
0*******
MV Oversample En
crovision detection engine whether we are
Tells the Ma
oversampling or not.
[6]
*0******
MV Pal En
etection engine to enter PAL mode.
Tells the Macrovision d
[5:0]
unt Start
**001101
MV Line Co
Sets the start line for Macrovision detection.
0x33
Read/Write
[7]
1*******
MV Detect Mode
0 = standard definition.
1 = progressive scan mode.
[6]
0******
V Settings Override
for line counts and pulse widths.
*
M
0 = use hard-coded settings
1 = use I2C values for these settings.
[5:0]
*010101
V Line Count End
ection.
*
M
Sets the end line for Macrovision det
0x34
Read/Write
t 3 lines (SD mode
[7:6]
10******
MV Pulse Limit Set
Sets the number of pulses required in the las
only).
[5]
**0*****
Low Freq Mode
dio PLL to low frequency mode. Low frequency mode
Sets au
should only be set for pixel clocks <80 MHz.
[4]
***0****
Low Freq Override
frequency mode
Allows the previous bit to be used to set low
rather than the internal auto-detect.
[3]
****0***
Up Conversion Mode
0 = repeat Cr and Cb values.
1 = interpolate Cr and Cb values.
[2]
****0**
rCb Filter Enable
output.
*
C
Enables the FIR filter for 4:2:2 CrCb
[1]
******0*
CSC_Enable
Enables the color space converter (CSC). The default settings for
the CSC provide HDTV-to-RGB conversion.
ficients, including
Sets the fixed point position of the CSC coef
the A4, B4, and C4 offsets.
0x35
Read/Write
[6:5]
*01* ****
CSC_Mode
00 = ±1.0, −4096 to +4095.
01 =±2.0, −8192 to +8190.
1× = ±4.0, −16384 to +16380.
[4:0]
**01100
SC_Coeff_A1 MSB
*
C
MSB, Register 0x36.



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