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PC7447AMGH1000LB データシート(PDF) 32 Page - ATMEL Corporation |
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PC7447AMGH1000LB データシート(HTML) 32 Page - ATMEL Corporation |
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32 / 44 page ![]() 32 5387B–HIREL–07/05 PC7447A [Preliminary] Figure 9-8. Test Access Port Timing Diagram Note: VM = Midpoint Voltage (OVDD/2) 10. Preparation for Delivery 10.1 Handling MOS devices must be handled with certain precautions to avoid damage due to accumulation of static charge. Input protection devices have been designed in the chip to minimize the effect of static buildup. However, the following handling practices are recommended: • Devices should be handled on benches with conductive and grounded surfaces • Ground test equipment, tools and operator • Do not handle devices by the leads • Store devices in conductive foam or carriers • Avoid use of plastic, rubber or silk in MOS areas • Maintain relative humidity above 50% if practical tJLOX Input Data Valid tIVJH tIXJH tJLOV tJLOZ Output Data Valid Output Data Valid VM TCK TDI, TMS TDO TDO VM |
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