PC7447AMGH1000LB datasheet(41/44 Pages) ATMEL

41 / 44 page

5387B–HIREL–07/05

PC7447A [Preliminary]

Figure 13-3. JTAG Interface Connection

Notes:

1. RUN/STOP, normally found on pin 5 of the COP header, is not implemented on the PC7447A.

Connect pin 5 of the COP header to OV

DD with a 10 kΩ pull-up resistor.

2. Key location; pin 14 is not physically present on the COP header.

3. Component not populated. Populate only if debug tool does not drive QACK.

4. Populate only if debug tool uses an open-drain type output and does not actively de-assert

QACK.

5. If the JTAG interface is implemented, connect HRESET from the target source to TRST from

the COP header though an AND gate to TRST of the part. If the JTAG interface is not imple-

mented, connect HRESET from the target source to TRST of the part through a 0

Ω isolation

resistor.

6. The COP port and target board should be able to independently assert HRESET and TRST to

the processor in order to fully control the processor as shown above.

HRESET

HRESET(6)

HRESET

SRESET

VDD_SENSE

5(1)

2 k

Ω

10 k

Ω

10 k

Ω

10 k

Ω

OVDD

CHKSTP_IN

TMS

TDO

TDI

TCK

TMS

TDO

TDI

TCK

TRST

14(2)

Key

QACK

OVDD

TRST(6)

10 k

Ω

10 k

Ω

10 k

Ω

10 k

Ω

OVDD

QACK

CHKSTP_OUT

KEY

No Pin

COP Connector

Physical Pin Out

10 k

Ω(4)

OVDD

2 k

Ω(3)

Ω(5)

From Target

Board Sources

(if any)

10 k

Ω

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