WM8772SEDSSLASHV datasheet(23/73 Pages) WOLFSON

23 / 73 page

Production Data

WM8772EDS – 28 LEAD SSOP

PD Rev 4.2 October 2005

DIGITAL AUDIO INTERFACE

MASTER AND SLAVE MODES

The audio interface operates in either Slave or Master mode, selectable using the MS control bit. In

both Master and Slave modes DIN1/2/3 are always inputs to the WM8772EDS and DOUT is always

an output. The default is Slave mode.

In Slave mode, LRC and BCLK are inputs to the WM8772EDS (Figure 21). DIN1/2/3 and LRC are

sampled by the WM8772EDS on the rising edge of BCLK. ADC data is output on DOUT and

changes on the falling edge of BCLK.

By setting the control bit BCP the polarity of BCLK may be reversed so that DIN1/2/3 and LRC are

sampled on the falling edge of BCLK and DOUT changes on the rising edge of BCLK.

LRC

DOUT

BCLK

DIN1/2/3

WM8772

CODEC

DSP

ENCODER/

DECODER

Figure 21 Slave Mode

In Master mode, LRC and BCLK are outputs from the WM8772EDS (Figure 22). LRC and BCLK are

generated by the WM8772EDS. DIN1/2/3 are sampled by the WM8772EDS on the rising edge of

BCLK so the controller must output DAC data that changes on the falling edge of BCLK. ADC data is

output on DOUT and changes on the falling edge of BCLK.

By setting control bit BCP the polarity of BCLK may be reversed so that DIN1/2/3 are sampled on the

falling edge of BCLK, and DOUT changes on the rising edge of BCLK.

DOUT

BCLK

DIN1/2/3

LRC

WM8772

CODEC

DSP/

ENCODER/

DECODER

Figure 22 Master Mode

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