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LAN9252/ML データシート(PDF) 295 Page - Microchip Technology

部品番号 LAN9252/ML
部品情報  2/3-Port EtherCAT® Slave Controller with Integrated Ethernet PHYs
PDF  329 Pages
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メーカー  MICROCHIP [Microchip Technology]
ホームページ  http://www.microchip.com
Logo MICROCHIP - Microchip Technology

LAN9252/ML データシート(HTML) 295 Page - Microchip Technology

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 2015 Microchip Technology Inc.
DS00001909A-page 295
LAN9252
13.0
EEPROM INTERFACE
The device contains an I2C master controller, which uses the EESCL and EESDA pins. EESCL and EESDA require an
external pull-up resistor. Both 1 byte and 2 byte addressed EEPROMs are supported. The size is determined by the
eeprom_size_strap.
13.1
I2C Interface Timing Requirements
This section specifies the I2C master interface input and output timings. The I2C master interface runs in fast-mode with
a rate of 148.8 kHz.
Note 41:
These values provide 400 ns of margin compared to the I2C fast-mode specification.
Note 42:
These values provide ~2100 ns of margin compared to the I2C fast-mode specification.
Note 43:
These values provide 300 ns of setup margin and 400 ns of hold margin compared to the I2C fast-mode
specification.
FIGURE 13-1:
I2C MASTER TIMING DIAGRAM
TABLE 13-1:
I2C MASTER TIMING VALUES
Symbol
Description
Min
Typ
Max
Units
fscl
EESCL clock frequency
-
148.8
-
kHz
thigh
EESCL high time
3.0
-
-
s
tlow
EESCL low time
3.0
-
-
s
tr
Rise time of EESDA and EESCL
-300
ns
tf
Fall time of EESDA and EESCL
-300
ns
tsu;sta
Setup time (provided to slave) of EESCL high before EESDA
output falling for repeated start condition
1000
Note 41
--
ns
thd;sta
Hold time (provided to slave) of EESCL after EESDA output fall-
ing for start or repeated start condition
1000
Note 41
--
ns
tsu;dat;in
Setup time (from slave) EESDA input before EESCL rising
200
Note 42
--
ns
thd;dat;in
Hold time (from slave) of EESDA input after EESCL falling
0
-
-
ns
tsu;dat;out
Setup time (provided to slave) EESDA output before EESCL
rising
400
Note 42
--
ns
thd;dat;out
Hold time (provided to slave) of EESDA output after EESCL fall-
ing
400
Note 42
--
ns
tsu;sto
Setup time (provided to slave) of EESCL high before EESDA
output rising for stop condition
1000
Note 41
--
ns
EESDA
(out)
EESCL
S
P
Sr
tf
tr
thd;sta
thd;dat;in
tsu;dat;in
tsu;sta
tsu;sto
EESDA
(in)
thigh
tlow
thd;dat;out
tsu;dat;out



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