ADS5294IPFPR datasheet(40/82 Pages) TI2

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ADS5294

SLAS776E – NOVEMBER 2011 – REVISED APRIL 2018

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(1)

The unused bits in each register (identified as blank table cells) must be programmed as '0'.

(2)

X = Register bit referenced by the corresponding name and description

(3)

Bits marked as '0' should be forced to 0, and bits marked as '1' should be forced to 1 when the particular register is programmed.

(4)

Multiple functions in a register can be programmed in a single write operation.

9.6 Register Maps

Table 6. Summary of Functions Supported by Serial Interface (1)(2)(3)(4)

ADDR.

(HEX)

D15

D14

D13

D12

D11

D10

NAME

DESCRIPTION

RST

1: Self-clearing software RESET; . After reset, this bit is set to 0

0: Normal operation.

EN_READOUT

1: READOUT of registers mode;0: Normal operation

EN_HIGH_ADDRS

0 – Disable access to register at address 0xF0

1 – Enable access to register at address 0xF0

EN_SYNC

1:Enable SYNC feature to synchronize the test patterns;

0: Normal operation, SYNC feature is disabled for the test patterns.

Note: this bit needs to be set as 1 when software or hardware SYNC

feature is used. see Reg.0x25[8] and 0x25[15]

RAMP_PAT_RESET_VAL

Ramp pattern reset value

PDN_CH<8:1>

1:Channel-specific ADC power-down mode;

0: Normal operation

PDN_PARTIAL

1:Partial power-down mode - fast recovery from power-down;

0: Normal operation

PDN_COMPLETE

1:Register mode for complete power-down - slower recovery;

0: Normal operation

PDN_PIN_CFG

1:Configures PD pin for partial power-down mode;

0:Configures PD pin for complete power-down mode

LFNS_CH<8:1>

1: Channel-specific low-frequency noise suppression mode enable;

0: LFNS disabled

EN_FRAME_PAT

1: Enables output frame clock to be programmed through a pattern;

0: Normal operation on frame clock

ADCLKOUT<13:0>

14-bit pattern for frame clock on ADCLKP and ADCLKN pins

PRBS_SEED<15:0>

PRBS pattern starting seed value lower 16 bits

INVERT_CH<8:1>

1: Swaps the polarity of the analog input pins electrically;

0: Normal configuration

PRBS_SEED<22:16>

PRBS seed starting value upper 7 bits

ADS5294IPFPR データシート(PDF) 40 Page - Texas Instruments

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