ADS5294IPFPR datasheet(5/82 Pages) TI2

5 / 82 page

ADS5294

www.ti.com

SLAS776E – NOVEMBER 2011 – REVISED APRIL 2018

Product Folder Links: ADS5294

Submit Documentation Feedback

5 Description (continued)

Serial LVDS outputs reduce the number of interface lines and enable the highest system integration. The digital

data from each channel ADC is output over one or two wires of LVDS output lines depending on the ADC

sampling rate. This 2-wire interface maintains a low serial-data rate, allowing low-cost FPGA-based receivers to

be used even at a high sample rate. The ADC resolution is programmed to 12-bit or 14-bit through registers. A

unique feature is the programmable-mapping module that allows flexible mapping between the input channels

and the LVDS output pins. This module greatly reduces the complexity of LVDS-output routing, and by reducing

the number of PCB layers, potentially results in cheaper system boards.

The device integrates an internal reference trimmed to accurately match across devices. Internal reference mode

achieves the best performance. External references can also drive the device.

The device is available in a 12-mm × 12-mm 80-pin QFP package. The device is specified over a –40°C to 85°C

operating temperature range. ADS5294 is completely pin-to-pin and register compatible to ADS5292.

ADS5294IPFPR データシート(PDF) 5 Page - Texas Instruments