データシートサーチシステム
  Japanese  ▼
ALLDATASHEET.JP

X  

L99UDL01 データシート(PDF) 46 Page - STMicroelectronics

部品番号 L99UDL01
部品情報  L99UDL01 Automotive Universal Door Lock IC
PDF  88 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
メーカー  STMICROELECTRONICS [STMicroelectronics]
ホームページ  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

L99UDL01 データシート(HTML) 46 Page - STMicroelectronics

Back Button L99UDL01 Datasheet HTML 42Page - STMicroelectronics L99UDL01 Datasheet HTML 43Page - STMicroelectronics L99UDL01 Datasheet HTML 44Page - STMicroelectronics L99UDL01 Datasheet HTML 45Page - STMicroelectronics L99UDL01 Datasheet HTML 46Page - STMicroelectronics L99UDL01 Datasheet HTML 47Page - STMicroelectronics L99UDL01 Datasheet HTML 48Page - STMicroelectronics L99UDL01 Datasheet HTML 49Page - STMicroelectronics L99UDL01 Datasheet HTML 50Page - STMicroelectronics Next Button
Zoom Inzoom in Zoom Outzoom out
 46 / 88 page
background image
Serial communications
L99UDL01
46/88
DS12511 Rev 5
5.9
Data-In payload
The Payload (Data Byte 1 and Data byte 2) is the data transferred to the L99UDL01 with
every SPI communication. The Payload always follows the OpCode and the Address bits.
For write accesses, the Payload represents the new data written to the addresses registers.
For Read & Clear operations the Payload indicates which bits to clear in the Status Register.
For every payload bit set to a “1” the corresponding Status bit is cleared.
For a Read Operation the Payload bits are not used. For functional safety reasons it is
recommended to set the unused Payload bits to ‘0’.
5.10
SDO frame
The Data-Out Frame consist of a Frame length 24 bits (GSB+Data1+Data2). The first eight
transmitted bits contain device related status information and are latched into the shift
register at the time of the Communication Start (falling edge of CSN). These 8 bits are called
the Global Status Byte (GSB) and are transmitted at every SPI transaction.
Figure 15. SDO frame
The subsequent bytes contain the payload data and are latched into the shift register with
every eighth positive SCK edge. This could lead to an inconsistency of data between the
GSB and Payload due to different shift register load times. It should be noted that no
Table 20. Status registers addresses
Status registers
RAM ADDR
Register
RWC
18H
Status register 18H
R
...
...
...
13H
Status register 13H
R(1)
1. Just the V3V3UV flag can be cleared
12H
Status register 12H
R/R&C
11H
Status register 11H
R/R&C
10H
Status register 10H
R/R&C



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88


データシート ダウンロード

Go To PDF Page


リンク URL



ALLDATASHEETはお客様のビジネスに役立ちますか?  [ DONATE ] 

Alldatasheetは   |   広告   |   お問い合わせ   |   プライバシーポリシー   |   データシートへのリンク    |   リンク交換   |   メーカーリスト
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com