L99UDL01 datasheet(24/88 Pages) STMICROELECTRONICS

24 / 88 page

Device description

L99UDL01

24/88

DS12511 Rev 5

2.5.2

Standby mode

Standby mode disables all circuitry except for the 3V3 pre-regulator and the circuitry related

to watch for a wake-up event. Nothing else is active. The charge pump is off and the outputs

are disabled.

Standby is entered by:



SPI command from Normal Mode,



When exiting Sleep Mode,



When VDD falls below VDDUV



When recovering from a 3V3 reset event.

Entering Standby by SPI command while in timed actuation, or when any output is active, is

not supported. Doing this may cause adverse responses from the device.

In addition to Emergency override mode Standby is the only mode that Normal mode can be

entered from. Transition to Standby Mode from Emergency Mode by SPI command is not

supported.

To attain the low quiescent state in Standby mode, the EN_OUT pin must be held low.

2.5.3

Normal mode

The L99UDL01 will exit Standby mode to Normal mode when the CSN pin is pulled down as

long as VDD>VDDUV. There is a delay from the falling edge of CSN to when Normal mode

is active (tWake_up). This delay is related to the charge pump and 3V3 regulator stabilization.

When the 3V3 voltage has reached its proper level, the SDO pin is pulled low from a tri-

stated condition. At that point, logic is operating, all circuits are activated and the SPI

controller can be used to update the register configuration.

When coming out from Standby, the configuration registers are set to their default values. In

this startup phase, the Charge Pump circuit starts working. In this case the drivers can be

enabled after tset_CP and the charge pump voltage exceeds the VCPLOW threshold. An

actuation can be initiated via EN_OUT pin or via an appropriate SPI frame. The CPLOW bit

is not cleared until the register is read and cleared.

2.5.4

Emergency mode

Emergency mode is a crash override mechanism that will interrupt any current actuation

command in progress and drives outputs according to the programmed values in the

command and configuration registers.

This mode also overrides all protections. In an Emergency mode the device will not latch off

if an overcurrent threshold is exceeded. Instead of latching off the driver and reporting a

fault the output will continue to retry as in Normal mode.

All faults will be reported while not acted upon.

Emergency mode is initiated when (1, 0) is entered in the register containing the EMCY bits

(register 01H). All other EMCY bit configurations result in normal mode.

When emergency is enabled any changes to the Output Override bits will be implemented

and the current timed actuation activity will be stopped. To initiate a new timed actuation

routine the OUT_ON bit must be set or the EN_OUT pin must be toggled.

While in Emergency mode the status bits (STAT [1:0]) will be automatically cleared

whenever there is a write to CR01H.

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