L99UDL01 datasheet(43/88 Pages) STMICROELECTRONICS

43 / 88 page

DS12511 Rev 5

43/88

L99UDL01

Serial communications

5.2.4

Serial Data Output (SDO)

This output signal is used to transfer data serially out of the device. Data is shifted out on the

falling edge of Serial Clock (SCK).

5.3

Clock and data characteristics

The ST-SPI can be driven by a microcontroller with its SPI peripheral running in following

mode:



CPOL = 0 and CPHA = 0.

Figure 13. SPI signal description

The communication frame starts with the falling edge of the CSN (Communication Start).

SCK has to be low. The SDI data is then latched at all following rising SCK edges into the

internal shift registers.

After Communication Start the SDO will leave Tristate mode and present the MSB of the

data shifted out to SDO. At all following falling SCK edges data is shifted out through the

internal shift registers to SDO.

The communication frame is finished with the rising edge of CSN. If a valid communication

took place (e.g. correct number of SCK cycles), the requested operation by the OpCode will

be performed (Write or Clear operation).

5.4

Protocol

The Data-In Frame consist of 24 bits (OpCode + Address + Data1 + Data2) (see Figure 12:

SPI pin description). The first two transmitted bits (OC1, OC2) contain the Operation Code

which represents the instruction that will be performed. The following 6 bits (A5 to A0)

represent the address on which the operation will be performed.

The subsequent 2 bytes (D15 – D0) contain the payload data.

All data are written and read using within the same 24 bit frame.

L99UDL01 データシート(PDF) 43 Page - STMicroelectronics