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MPC8309CVMADDC データシート(PDF) 27 Page - NXP Semiconductors

部品番号 MPC8309CVMADDC
部品情報  PowerQUICC II Pro Integrated Communications Processor Family Hardware Specifications
PDF  81 Pages
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メーカー  NXP [NXP Semiconductors]
ホームページ  http://www.nxp.com
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MPC8309CVMADDC データシート(HTML) 27 Page - NXP Semiconductors

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MPC8309 PowerQUICC II Pro Integrated Communications Processor Family Hardware Specifications, Rev. 3
Freescale Semiconductor
27
Ethernet and MII Management
The following figure shows the RMII receive AC timing diagram.
Figure 16. RMII Receive AC Timing Diagram
8.3
Ethernet Management Interface Electrical Characteristics
The electrical characteristics specified here apply to MII management interface signals MDIO
(management data input/output) and MDC (management data clock). The electrical characteristics for
MII, and RMII are specified in Section 8.1, “Ethernet Controller (10/100 Mbps)—MII/RMII Electrical
Characteristics.”
8.3.1
MII Management DC Electrical Characteristics
MDC and MDIO are defined to operate at a supply voltage of 3.3 V. The DC electrical characteristics for
MDIO and MDC are provided in the following table.
8.3.2
MII Management AC Electrical Specifications
The following table provides the MII management AC timing specifications.
Table 24. MII Management DC Electrical Characteristics When Powered at 3.3 V
Parameter
Symbol
Conditions
Min
Max
Unit
Supply voltage (3.3 V)
OVDD
—3
3.6
V
Output high voltage
VOH
IOH = –1.0 mA
OVDD =Min
2.40
OVDD + 0.3
V
Output low voltage
VOL
IOL = 1.0 mA
OVDD = Min
GND
0.50
V
Input high voltage
VIH
—2.00
V
Input low voltage
VIL
0.80
V
Input current
IIN
0 V
 VIN  OVDD
—±5
A
Table 25. MII Management AC Timing Specifications
At recommended operating conditions with OVDD is 3.3 V ± 300mV.
Parameter/Condition
Symbol1
Min
Typical
Max
Unit
Note
MDC frequency
fMDC
—2.5
MHz
MDC period
tMDC
—400
ns
MDC clock pulse width high
tMDCH
32
ns
REF_CLK
RXD[1:0]
tRMRDXKH
tRMX
tRMXH
tRMXR
tRMXF
CRS_DV
RX_ER
tRMRDVKH
Valid Data



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