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ADL5385ACPZ-R7 データシート(PDF) 21 Page - Analog Devices |
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ADL5385ACPZ-R7 データシート(HTML) 21 Page - Analog Devices |
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21 / 24 page  Data Sheet ADL5385 Rev. D | Page 21 of 24 EVALUATION BOARD One populated, RoHS-compliant ADL5385 evaluation board is available, the ADL5385-DIFFLO-EBZ. The ADL5385-DIFFLO- EBZ can be configured to allow a differential LO drive through a balun or direct interfacing to a PLL evaluation board. It also includes component pads in its LO path to accommodate a harmonic filter. The four baseband inputs are located on one edge of the board to allow direct connection to a high speed DAC evaluation board. The ADL5385-DIFFLO-EBZ also includes an RF/IF amplifier. The modulator output can be measured directly at the RF_OUT SMA connector. Alternatively, by removing R40, and installing a 0 Ω resistor in the R25 pad, the modulator output can be fed to the RF amplifier. The ADL5385-DIFFLO-EBZ ships installed with an ADL5601 amplifier (50 MHz to 4000 MHz RF/IF amplifier). The ADL5602 can be used if more gain is needed. Figure 43, Table 8, Figure 44, and Figure 45 show the schematic, configuration options, and layouts for the ADL5385-DIFFLO-EBZ, respectively. 1SINGLE-ENDED LO DRIVINGAT LOIP. 2DIFFERENTIAL LO DRIVINGAT LOIP WITH T1 OR T2. 24 23 22 21 20 19 7 8 9 10 11 12 ADL5385 U1 EXPOSED PADDLE VP 32 S1 VPS2 VP C9 100pF C6 0.1µF GND GND R62 49.9Ω GND 1 LO_IP C15 R15 D.N.I LO_IN C40 0Ω R32 R34 0Ω C17 D.N.I C14 T1 OR T22 C16 D.N.I 1 6 4 3 R431 R111 R13 C18 D.N.I GND GND GND D.N.I 0.1µF 0.1µF R10 0Ω GND D.N.I 0Ω 0Ω 0Ω GND GND TEMP YEL RTEMP 200Ω VP C5 100pF C4 0.1µF GND GND C31 R40 0.1µF D.N.I RF_OUT 1 2 (2) 3 68pF L8 470nH VPOS_AMP RED C47 AMP_OUT GND GND GND GND GND GND VP R8 0Ω D.N.I 0.1µF C45 C44 C43 1µF 1.2nF QNBB R1 QPBB R2 0Ω R6 R17 C81 D.N.I C87 D.N.I C75 D.N.I 0Ω C76 D.N.I C41 D.N.I C80 D.N.I C86 D.N.I C82 D.N.I C88 D.N.I INBB R33 IPBB R4 0Ω R3 R36 C78 D.N.I C84 D.N.I C90 D.N.I 0Ω C91 D.N.I C89 D.N.I C83 D.N.I C77 D.N.I C85 D.N.I C79 D.N.I 0Ω 0Ω 0Ω 0Ω GND GND GND GND GND GND GND C3 0.1µF C8 GND GND VP C11 100pF GND 10µF RED VP1 R61 10kΩ ON OFF SEC PRI R25 0Ω GND GND GND GND GND GND GND GND GND GND COM3 COM3 LOIP LOIN VPS3 VPS3 ENBL TEMP VPS1 VPS1 VOUT GND T1 TC1-1-43A+ T2 TC1-1-13M+ U2 ADL5601 GND GND1 BLACK GND GND2 BLACK Figure 43. ADL5385-DIFFLO-EBZ Schematic Table 8. ADL5385-DIFFLO-EBZ Configuration Options Component Description Default Value VP1, VPOS_AMP, GND1, GND2 Power supply clip leads, and ground clip leads. Red (VP1) = 5 V, red (VPOS_AMP) = GND, GND1 and GND2 = black GND Not applicable S1, R61, R62 Device enable select. Set S1 to VP to enable the device. Set S1 to GND to power down the device. S1 = on, R61 = 10 kΩ, R62 = 49.9 Ω R1, R2, R3, R4, R6, R17, R33, R36, C41, C75 to C91 Baseband input filters. These components can be used to implement a low-pass filter for the baseband signals. R1, R2, R3, R4, R6, R17, R33, R36 = 0 Ω, C41, C75 to C91 = open C14, C15 LO driving capacitor. C14, C15 = 0.1 μF R15, R32, R34, C16 to C18, C40 LO input filters. These components can be used to implement a filter for the LO input signals. R15, R32 = open, R34, C40 = 0 Ω, C16 to C18 = open |
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