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STW4811MBRAT/HF データシート(PDF) 73 Page - STMicroelectronics

部品番号 STW4811MBRAT/HF
部品情報  Power management for multimedia processors
PDF  85 Pages
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メーカー  STMICROELECTRONICS [STMicroelectronics]
ホームページ  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

STW4811MBRAT/HF データシート(HTML) 73 Page - STMicroelectronics

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STw4811M/STw4811N
Electrical and timing characteristics
CD00131784
73/85
5.6
SD/MMC/SDIO card interface
tS
Settling time
OFF->ON
IOUT = 0mA
25
µs
tD
Discharge time
ON>OFF
IOUT = 0mA
400
µs
1.
From 4.8 V to 5.5 V, charge pump is “Off” and no OTG feature is provided
2.
Guaranteed by design
Table 51.
USB OTG transceiver (continued)
Symbol
Description
Test conditions
Min.
Typ.
Max.
Units
Table 52.
SD/MMC/SDIO card interface
Symbol
Description
Test conditions
Min.
Typ.
Max.
Units
VMMC regulator specifications (’pdn_vmmc’ = 1)
VIN
Input voltage
VOUT = 3.3 V
VOUT = 3 V
VOUT = 2.85 V
VOUT = 2.7 V
VOUT = 2.6 V
VOUT = 1.8/1.85 V
3.55
3.25
3.1
2.95
2.85
2.7
3.6
5.5
V
VOUT
Output voltage
-3%
3.3
3
2.85
2.7
2.6
1.85
1.8
+3%
V
IOUT
Output current
150
mA
ISHORT
Short circuit
current limitation
240
360
600
mA
IQ
Quiescent current
IOUT = 0 mA
30
µA
ILKG
Power-down
current
’pdn_vmmc’ = 0
1
µA
PSRR(1)
Power supply
rejection
IOUT = 150 mA
Vpp = 0.3 V
f < 20 kHz
45
dB
LIR
(1)
Line regulation
VOUT=2.85 V
VBAT: [3.1; 4.8]V
5mV
LDR
(1)
Load regulation
VOUT=2.85 V
IOUT= [1; 150] mA
10
mV
LIRT
Transient line
regulation
VOUT=2.85 V
VBAT: 3.1 to 3.4V
tR = tF = 10 µs.
2mV



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