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STW4811MBRAT/HF データシート(PDF) 37 Page - STMicroelectronics |
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STW4811MBRAT/HF データシート(HTML) 37 Page - STMicroelectronics |
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37 / 85 page ![]() STw4811M/STw4811N Functional description CD00131784 37/85 VCORE_sleep register Table 29. VCORE_sleep register at address = 21h Register 7 6 5 4 321 0 Bit name vcore_ available vcore_sleep[3:0] Type RR/W Bits Name Value Settings Default [3:0] vcore_sleep[3:0] 0000 0001 0010 0011 0100 0101 0110 0111 1000 1001 1010 1011 1100 1101 1110 1111 = 1.00V = 1.05V = 1.10V = 1.15V = 1.20V = 1.22V = 1.24V = 1.26V (default) = 1.28V = 1.30V = 1.32V = 1.34V = 1.36V = 1.38V = 1.40V = 1.45V 0111 4 vcore_available (1) 1. read operation reset the value after status read operation from APE, functionality is described in Section 4.3.7: Power supply monitoring 0 1 Inactive Reach the expected value when Vcore decreases or increases 0 |
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