CY8C53_11 datasheet(37/106 Pages) CYPRESS

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PRELIMINARY

PSoC® 5: CY8C53 Family Datasheet

Document Number: 001-66237 Rev. *A

Page 37 of 106

7.2.2 Datapath Module

The datapath contains an 8-bit single cycle ALU, with associated compare and condition generation logic. This datapath block is

optimized to implement embedded functions, such as timers, counters, integrators, PWMs, PRS, CRC, shifters and dead band

generators and many others.

Figure 7-8. Datapath Top Level

7.2.2.6

Working Registers

The datapath contains six primary working registers, which are

accessed by CPU firmware or DMA during normal operation.

7.2.2.7

Dynamic Datapath Configuration RAM

Dynamic configuration is the ability to change the datapath

function and internal configuration on a cycle-by-cycle basis,

under sequencer control. This is implemented using the 8-word

x 16-bit configuration RAM, which stores eight unique 16-bit wide

configurations. The address input to this RAM controls the

sequence, and can be routed from any block connected to the

UDB routing matrix, most typically PLD logic, I/O pins, or from

the outputs of this or other datapath blocks.

ALU

The ALU performs eight general purpose functions. They are:

Increment

Decrement

Add

Subtract

Logical AND

Logical OR

Logical XOR

Pass, used to pass a value through the ALU to the shift register,

mask, or another UDB register

ALU

Mask

Shift

Data Registers

Output

Muxes

FIFOs

Accumulators

Output to

Programmable

Routing

Chaining

Parallel Input/Output

(To/From Programmable Routing)

Input from

Programmable

Routing

Input

Muxes

To/From

Datapath

To/From

Datapath

PHUB System Bus

R/W Access to All

Registers

Table 7-1. Working Datapath Registers

Name

Function

Description

A0 and A1 Accumulators

These are sources and sinks for

the ALU and also sources for the

compares.

D0 and D1 Data Registers

These are sources for the ALU

and sources for the compares.

F0 and F1

FIFOs

These are the primary interface

to the system bus. They can be a

data source for the data registers

and accumulators or they can

capture data from the accumu-

lators or ALU. Each FIFO is four

bytes deep.

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