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CY8C53 データシート(PDF) 49 Page - Cypress Semiconductor |
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CY8C53 データシート(HTML) 49 Page - Cypress Semiconductor |
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49 / 106 page  PRELIMINARY PSoC® 5: CY8C53 Family Datasheet Document Number: 001-66237 Rev. *A Page 49 of 106 Figure 8-4. Analog Comparator 8.3.2 LUT The CY8C53 family of devices contains four LUTs. The LUT is a two input, one output lookup table that is driven by any one or two of the comparators in the chip. The output of any LUT is routed to the digital system interface of the UDB array. From the digital system interface of the UDB array, these signals can be connected to UDBs, DMA controller, I/O, or the interrupt controller. The LUT control word written to a register sets the logic function on the output. The available LUT functions and the associated control word is shown in Table 8-1 . ANAIF + _ + + _ comp2 _ comp0 comp1 + _ comp3 4 LUT0 LUT1 LUT2 LUT3 4 4 4 4 4 4 4 From Analog Routing From Analog Routing From Analog Routing From Analog Routing UDBs Table 8-1. LUT Function vs. Program Word and Inputs Control Word Output (A and B are LUT inputs) 0000b FALSE (‘0’) 0001b A AND B 0010b A AND (NOT B) 0011b A 0100b (NOT A) AND B 0101b B 0110b A XOR B 0111b A OR B 1000b A NOR B 1001b A XNOR B 1010b NOT B 1011b A OR (NOT B) 1100b NOT A 1101b (NOT A) OR B 1110b A NAND B 1111b TRUE (‘1’) [+] Feedback |
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