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DAC5687MPZPEP データシート(PDF) 31 Page - Texas Instruments

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部品番号 DAC5687MPZPEP
部品情報  16-BIT 500-MSPS 2쨈??쨈 INTERPOLATING DUAL-CHANNEL DIGITAL-TO-ANALOG CONVERTER (DAC)
PDF  75 Pages
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メーカー  TI1 [Texas Instruments]
ホームページ  http://www.ti.com
Logo TI1 - Texas Instruments

DAC5687MPZPEP データシート(HTML) 31 Page - Texas Instruments

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Register Name: DACB_OFFSET_0— Address: 0x10, Default = 0x00
Register Name: DACA_OFFSET_1— Address: 0x11, Default = 0x00
Register Name: DACB_OFFSET_1— Address: 0x12, Default = 0x00
Register Name: QMCA_GAIN_0— Address: 0x13, Default = 0x00
Register Name: QMCB_GAIN_0— Address: 0x14, Default = 0x00
Register Name: QMC_PHASE_0— Address: 0x15, Default = 0x00
Register Name: QMC_PHASE_GAIN_1— Address: 0x16, Default = 0x00
DAC5687-EP
SGLS333 – JUNE 2006
BIT 7
BIT 0
dacb_offset(7:0)
0
0
0
0
0
0
0
0
dacb_offset(7:0): Bits 7:0 of the DAC B offset word. Updates to this register do not take effect until
DACA_OFFSET_0 has been written.
BIT 7
BIT 0
daca_offset(12:8)
unused
unused
unused
0
0
0
0
0
0
0
0
daca_offset(12:8): Bits 12:8 of the DAC A offset word. Updates to this register do not take effect until
DACA_OFFSET_0 has been written.
BIT 7
BIT 0
dacb_offset(12:8)
unused
unused
unused
0
0
0
0
0
0
0
0
dacb_offset(12:8): Bits 12:8 of the DAC B offset word. Updates to this register do not take effect until
DACA_OFFSET_0 has been written.
BIT 7
BIT 0
qmc_gain_a(7:0)
0
0
0
0
0
0
0
0
qmc_gain_a(7:0): Bits 7:0 of the QMC A path gain word. Updates to this register do not take effect until
DACA_OFFSET_0 has been written.
BIT 7
BIT 0
qmc_gain_b(7:0)
0
0
0
0
0
0
0
0
qmc_gain_b(7:0): Bits 7:0 of the QMC B path gain word. Updates to this register do not take effect until
DACA_OFFSET_0 has been written.
BIT 7
BIT 0
qmc_phase(7:0)
0
0
0
0
0
0
0
0
qmc_phase(7:0): Bits 7:0 of the QMC phase word. Updates to this register do not take effect until
DACA_OFFSET_0 has been written.
BIT 7
BIT 0
qmc_phase(9:8)
qmc_gain_a(10:8)
qmc_gain_b(10:8)
0
0
0
0
0
0
0
0
31
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