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DAC5687MPZPEP データシート(PDF) 32 Page - Texas Instruments

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部品番号 DAC5687MPZPEP
部品情報  16-BIT 500-MSPS 2쨈??쨈 INTERPOLATING DUAL-CHANNEL DIGITAL-TO-ANALOG CONVERTER (DAC)
PDF  75 Pages
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メーカー  TI1 [Texas Instruments]
ホームページ  http://www.ti.com
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DAC5687MPZPEP データシート(HTML) 32 Page - Texas Instruments

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Register Name: DACA_GAIN_0— Address: 0x17, Default = 0x00
Register Name: DACB_GAIN_0— Address: 0x18, Default = 0x00
Register Name: DACA_DACB_GAIN_1— Address: 0x19, Default = 0xFF
Register Name: DAC_CLK_CNTL— Address: 0x1A, Default = 0x00
Register Name: ATEST— Address: 0x1B, Default = 0x00
DAC5687-EP
SGLS333 – JUNE 2006
qmc_phase(9:8): Bits 9:8 of the QMC phase word. Updates to this register do not take effect until
DACA_OFFSET_0 has been written.
qmc_gain_a(10:8) : Bits 10:8 of the QMC A path gain word. Updates to this register do not take effect until
DACA_OFFSET_0 has been written.
qmc_gain_b(10:8): Bits 10:8 of the QMC B path gain word. Updates to this register do not take effect until
DACA_OFFSET_0 has been written.
BIT 7
BIT 0
daca_gain(7:0)
0
0
0
0
0
0
0
0
daca_gain(7:0): Bits 7:0 of the DAC A gain adjustment word.
BIT 7
BIT 0
dacb_gain(7:0)
0
0
0
0
0
0
0
0
dacb_gain(7:0): Bits 7:0 of the DAC B gain adjustment word.
BIT 7
BIT 0
daca_gain(11:8)
dacb_gain(11:8)
1
1
1
1
1
1
1
1
daca_gain(11:8): Four MSBs of gain control for DACA.
dacb_gain(11:8): Bits 11:8 of the DAC B gain word. Four MSBs of gain control for DACB.
BIT 7
BIT 0
factory use only
0
0
0
0
0
0
0
0
Reserved for factory use only.
BIT 7
BIT 0
atest(4:0)
phstr_del(1:0)
unused
0
0
0
0
0
0
0
0
atest:
Can be used to enable clock output at the PLLLOCK pin according to Table 5. Pin EXTLO must be
open when atest (4:0) is not equal to 00000.
32
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