LM2512A

SNLS269B – AUGUST 2007 – REVISED MAY 2013

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ELECTRICAL CHARACTERISTICS (continued)

Over recommended operating supply and temperature ranges unless otherwise specified.

(1)(2)

Symbol

Parameter

Conditions

Min

Typ

Max

Units

Total Supply Current -

MC = 80 MHz,

0.02

0.07

mA

Checkerboard Pattern

5.4

9.0

mA

MC = 60 MHz,

0.01

mA

Checkerboard Pattern

4.1

mA

2 MD Lane

Supply Current -Enabled

MC = 60 MHz,

0.02

mA

Pseudo-Random

Pattern

3.7

mA

2 MD Lane

Supply Current—Disable

PD* = L

<1

2

µA

Power Down Modes

<1

5

µA

Ta = 25°C

Stop Clock

<1

2

µA

<1

5

µA

(3)

For IDD tests - input signal conditions are: (swing, edge, freq, DE = H, VS = L, HS = L, RGB Checkerboard Pattern: AAAAAA-555555)

(4)

3.0V, MAX VDDA = VDD = 2.0V.

SWITCHING CHARACTERISTICS

Over recommended operating supply and temperature ranges unless otherwise specified.

(1)

Symbol

Parameter

Conditions

Min

Typ

Max

Units

PARALLEL BUS TIMING

Set Up Time

SER Inputs Figure 1

5

ns

Hold Time

5

ns

SERIAL BUS TIMING

Serial Data Valid before Clock

SER Data Pulse Width Figure 2, (2) (3)

0.38

UI

Edge

Serial Data Valid after Clock

0.38

UI

Edge

POWER UP TIMING

Bias Up Time

See Figure 9

PCLK

200

cycles

MC Pulse Width LOW

PCLK

200

cycles

MC Pulse Width HIGH

PCLK

20

cycles

MC Pulse LOW

PCLK

8

cycles

MC Pulse LOW - SER PLL

PCLK

600

Lock Counter

cycles

Enable Time - Clock Start

MPL POWER OFF TIMING

Disable Time to Power Down

15

ms

Disable Time - Clock Stop

PCLK

2

cycles

SPI INTERFACE

(1)

(2)

1 UI is the serial data MD pulse width = 1 / 8xPCLK (3 MD lanes), 1 UI is the serial data MD pulse width = 1 / 12xPCLK (2 MD lanes)

(3)

This is a functional parameter and is specified by design or characterization.

(4)

Enable Time is a complete MPL start up comprised of t0 + t1 + t2 + t3 + t4.

(5)

4

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