PM0215 datasheet(63/91 Pages) STMICROELECTRONICS

部品番号	PM0215

部品情報	STM32F0xxx Cortex-M0 programming manual

PDF	91 Pages

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メーカー	STMICROELECTRONICS [STMicroelectronics]

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63 / 91 page

PM0215

The STM32 Cortex-M0 instruction set

Doc ID 022979 Rev 1

63/91

3.7.3

DMB

Data memory barrier.

Syntax

DMB

Operation

DMB acts as a data memory barrier. It ensures that all explicit memory accesses that

appear, in program order, before the DMB instruction are completed before any explicit

memory accesses that appear, in program order, after the DMB instruction. DMB does not

affect the ordering or execution of instructions that do not access memory.

Restrictions

None

Condition flags

This instruction does not change the flags.

Examples

DMB

; Data Memory Barrier

3.7.4

DSB

Data synchronization barrier.

Syntax

DSB

Operation

DSB acts as a special data synchronization memory barrier. Instructions that come after the

DSB, in program order, do not execute until the DSB instruction completes. The DSB

instruction completes when all explicit memory accesses before it complete.

Restrictions

None

Condition flags

This instruction does not change the flags.

Examples

DSB

; Data Synchronisation Barrier

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