L9663 datasheet(86/104 Pages) STMICROELECTRONICS

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Communication interface

L9663

86/104

DocID028693 Rev 1

SPI error handling

The SPI message from the external microcontroller is monitored. The following errors are

detected:



the CRC on the MOSI line is not correct;



incorrect SPI operation (e.g. an attempt to write a read-only register);



the number of SPI clock cycles is not equal to 32.

In case any of the above-mentioned errors is detected, the MOSI message is rejected, the

SPI failure bit in the SR1 register is set and the SPIE status bit in the next MISO message is

set to '1'.

5.3

Direct interface

The direct interface has the following features:



DOUTx output for Manchester-coded sensor data



SYNCx input for synchronous pulse voltage trigger



Deglitch filter for SYNCx input of PSI5 transceiver

The reference voltage for the threshold levels of DOUTx pins is VDD.

The direct interface is only used in transceiver IC mode 2 (data decoding in the μC).

To use direct mode slot monitor should be disabled on the channel.

In order to have good device functionality all registers, except the ones listed below, must be

configured if default values do not match the application.(j)

The registers that do not need a configuration are the following: SIDx, TSMx_ESy,

TSMx_END.

Optional configuration: SPT (if sync pulse period is smaller than 500 μs), ADVSET1/2/3 if a

particular set of tracking is required, UDBCR, UDBx_y to use tooth gap method, DCR, STS,

STSR.

Registers needing a configuration: CHCNT, CHx_CR1, CHx_CR2, CHx_CR3, CHx_CR4, GCR1.

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