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MPC875 データシート(PDF) 47 Page - Freescale Semiconductor, Inc |
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MPC875 データシート(HTML) 47 Page - Freescale Semiconductor, Inc |
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47 / 84 page  MPC875/MPC870 Hardware Specifications, Rev. 3.0 47 PRELIMINARY—SUBJECT TO CHANGE WITHOUT NOTICE Freescale Semiconductor CPM Electrical Characteristics 13.2 IDMA Controller AC Electrical Specifications Table 18 provides the IDMA controller timings as shown in Figure 41 to Figure 44. Figure 41. IDMA External Requests Timing Diagram Table 18. IDMA Controller Timing Num Characteristic All Frequencies Unit Min Max 40 DREQ setup time to clock high 7 — ns 41 DREQ hold time from clock high 1 1 Applies to high-to-low mode (EDM=1) TBD — ns 42 SDACK assertion delay from clock high — 12 ns 43 SDACK negation delay from clock low — 12 ns 44 SDACK negation delay from TA low — 20 ns 45 SDACK negation delay from clock high — 15 ns 46 TA assertion to falling edge of the clock setup time (applies to external TA)7 — ns 41 40 DREQ (Input) CLKO (Output) |
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