データシートサーチシステム
  Japanese  ▼
ALLDATASHEET.JP

X  

Preview PDF HTML

WM8753LEB/V データシート(PDF) 31 Page - Wolfson Microelectronics plc

部品番号 WM8753LEB/V
部品情報  HI FI AND TELEPHONY DUAL CODEC
PDF  87 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
メーカー  WOLFSON [Wolfson Microelectronics plc]
ホームページ  http://www.wolfsonmicro.com
Logo WOLFSON - Wolfson Microelectronics plc

WM8753LEB/V データシート(HTML) 31 Page - Wolfson Microelectronics plc

Back Button WM8753LEB/V Datasheet HTML 27Page - Wolfson Microelectronics plc WM8753LEB/V Datasheet HTML 28Page - Wolfson Microelectronics plc WM8753LEB/V Datasheet HTML 29Page - Wolfson Microelectronics plc WM8753LEB/V Datasheet HTML 30Page - Wolfson Microelectronics plc WM8753LEB/V Datasheet HTML 31Page - Wolfson Microelectronics plc WM8753LEB/V Datasheet HTML 32Page - Wolfson Microelectronics plc WM8753LEB/V Datasheet HTML 33Page - Wolfson Microelectronics plc WM8753LEB/V Datasheet HTML 34Page - Wolfson Microelectronics plc WM8753LEB/V Datasheet HTML 35Page - Wolfson Microelectronics plc Next Button
Zoom Inzoom in Zoom Outzoom out
 31 / 87 page
background image
WM8753L
Advanced Information
w
AI Rev 3.1 June 2004
31
REGISTER
ADDRESS
BIT
LABEL
DEFAULT
DESCRIPTION
7:0
LADCVOL
[7:0]
11000011
( 0dB )
Left ADC Digital Volume Control
0000 0000 = Digital Mute
0000 0001 = -97dB
0000 0010 = -96.5dB
... 0.5dB steps up to
1111 1111 = +30dB
R16(10h)
Left ADC
Digital Volume
8
LAVU
0
Left ADC Volume Update
0 = Store LADCVOL in intermediate latch
(no gain change)
1 = Update left and right channel gains
(left = LADCVOL, right =
intermediate latch)
7:0
RADCVOL
[7:0]
11000011
( 0dB )
Right ADC Digital Volume Control
0000 0000 = Digital Mute
0000 0001 = -97dB
0000 0010 = -96.5dB
... 0.5dB steps up to
1111 1111 = +30dB
R17 (11h)
Right
ADC
Digital Volume
8
RAVU
0
Right ADC Volume Update
0 = Store RADCVOL in intermediate
latch (no gain change)
1 = Update left and right channel gains
(left = intermediate latch, right =
RADCVOL)
Table 19 ADC Digital Volume Control
AUTOMATIC LEVEL CONTROL (ALC)
The WM8753L has an automatic level control that aims to keep a constant recording volume
irrespective of the input signal level. This is achieved by continuously adjusting the PGA gain so that
the signal level at the ADC input remains constant. A digital peak detector monitors the ADC output
and changes the PGA gain if necessary.
hold
time
decay
time
attack
time
input
signal
signal
after
ALC
PGA
gain
ALC
target
level
Figure 10 ALC Operation



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87


データシート ダウンロード

Go To PDF Page


リンク URL



ALLDATASHEETはお客様のビジネスに役立ちますか？  [ DONATE ] 

Alldatasheetは   |   広告   |   お問い合わせ   |   プライバシーポリシー   |   データシートへのリンク    |   リンク交換   |   メーカーリスト
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com