STA321MPL1 datasheet(19/80 Pages) STMICROELECTRONICS

19 / 80 page

DocID029389 Rev 1

19/80

STA321MPL1

I2C bus operation

4.4

Read operation

4.4.1

Current address byte read

Following the START condition, the master sends a device select code with the RW bit set

to 1. The STA321MPL1 acknowledges this and then responds by sending one byte of data.

The master then terminates the transfer by generating a STOP condition.

4.4.2

Current address multi-byte read

The multi-byte read modes can start from any internal address. Sequential data bytes are

read from sequential addresses within the STA321MPL1. The master acknowledges each

data byte read and then generates a STOP condition, terminating the transfer.

4.4.3

Random address byte read

Following the START condition, the master sends a device select code with the RW bit set

to 0. The STA321MPL1 acknowledges this and then the master writes the internal address

byte. After receiving the internal byte address, the STA321MPL1 again responds with an

acknowledgement. The master then initiates another START condition and sends the device

select code with the RW bit set to 1. The STA321MPL1 acknowledges this and then

responds by sending one byte of data. The master then terminates the transfer by

generating a STOP condition.

4.4.4

Random address multi-byte read

The multi-byte read mode can start from any internal address. Sequential data bytes are

read from sequential addresses within the STA321MPL1. The master acknowledges each

data byte read and then generates a STOP condition, terminating the transfer.

Figure 7. Read mode sequence

STA321MPL1 データシート(PDF) 19 Page - STMicroelectronics