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AM652X データシート(PDF) 207 Page - Texas Instruments |
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AM652X データシート(HTML) 207 Page - Texas Instruments |
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207 / 299 page  SDR122 SDR121 SDR120 SDR126 SDR125 SDR128 SDR127 MMC1_CLK MMC1_CMD MMC1_DAT[3:0] MMC1_05 MMC1_CLK MMC1_CMD MMC1_DAT[3:0] HSSD1 HSSD2L HSSD2H HSSD5 HSSD6 HSSD5 HSSD6 MMC1_04 207 AM6548, AM6528, AM6546 AM6526, AM6527 www.ti.com SPRSP08E – NOVEMBER 2017 – REVISED OCTOBER 2018 Submit Documentation Feedback Product Folder Links: AM6548 AM6528 AM6546 AM6526 AM6527 Specifications Copyright © 2017–2018, Texas Instruments Incorporated Figure 5-79. MMC/SD in - High Speed - Transmitter Mode 5.11.5.16.2.3 UHS-I SDR12, 4-bit data, half-cycle Table 5-75 and Table 5-76 present Timing requirements and Switching characteristics for MMC1 - SDR12 in receiver and transmitter mode (see Figure 5-80 and Figure 5-81). Table 5-75. Timing Requirements for MMC1 - SD Card SDR12 Mode NO. PARAMETER DESCRIPTION MODE MIN MAX UNIT SDR125 tsu(cmdV-clkH) Setup time, MMC1_CMD valid before MMC1_CLK rising clock edge Positive-edge Reference Clock 23.28 ns SDR126 th(clkH-cmdV) Hold time, MMC1_CMD valid after MMC1_CLK rising clock edge Positive-edge Reference Clock 1.67 ns SDR127 tsu(dV-clkH) Setup time, MMC1_DAT[3:0] valid before MMC1_CLK rising clock edge Positive-edge Reference Clock 23.28 ns SDR128 th(clkH-dV) Hold time, MMC1_DAT[3:0] valid after MMC1_CLK rising clock edge Positive-edge Reference Clock 1.67 ns Table 5-76. Switching Characteristics for MMC1 - SD Card SDR12 Mode NO. PARAMETER DESCRIPTION MODE MIN MAX UNIT SDR120 fop(clk) Operating frequency, MMC1_CLK Positive-edge Reference Clock 24 MHz SDR121 tw(clkH) Pulse duration, MMC1_CLK high Positive-edge Reference Clock 19.49 ns SDR122 tw(clkL) Pulse duration, MMC1_CLK low Negative-edge Reference Clock 19.49 ns SDR123 td(clkL-cmdV) Delay time, MMC1_CLK falling clock edge to MMC1_CMD transition Negative-edge Reference Clock -14.39 14.39 ns SDR124 td(clkL-dV) Delay time, MMC1_CLK falling clock edge to MMC1_DAT[3:0] transition Negative-edge Reference Clock -14.39 14.39 ns (1) P = output MMC1_CLK period in ns Figure 5-80. MMC/SD in - High Speed SDR12 - Receiver Mode |
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