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AM652X データシート(PDF) 232 Page - Texas Instruments |
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AM652X データシート(HTML) 232 Page - Texas Instruments |
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232 / 299 page  T1 T2 TIMIx TIMER_01 T3 T4 TIMOx PMIT5 MII_TXCLK (input) MII_TXD[3:0], MII_TXEN (outputs) SPRS91x_TIMING_PRU_MII_RT_07 232 AM6548, AM6528, AM6546 AM6526, AM6527 SPRSP08E – NOVEMBER 2017 – REVISED OCTOBER 2018 www.ti.com Submit Documentation Feedback Product Folder Links: AM6548 AM6528 AM6546 AM6526 AM6527 Specifications Copyright © 2017–2018, Texas Instruments Incorporated Table 5-119. PRU_ICSSG MII_RT Switching Characteristics – MII_TXD[3:0] and MII_TXEN NO. PARAMETER DESCRIPTION MODE MIN MAX UNIT PMIT5 td(TX_CLK-TXD) Delay time, TX_CLK High to TXD[3:0] valid 10 Mbps 5 25 ns td(TX_CLK-TX_EN) Delay time, TX_CLK to TX_EN valid 5 25 ns td(TX_CLK-TXD) Delay time, TX_CLK High to TXD[3:0] valid 100 Mbps 5 25 ns td(TX_CLK-TX_EN) Delay time, TX_CLK to TX_EN valid 5 25 ns Figure 5-128. PRU_ICSSG MII_TXD[3:0], MII_TXEN Timing For more information, see section Programmable Real-Time Unit Subsystem and Industrial Communication Subsystems - Gigabit (PRU_ICSSG) in chapter Processors and Accelerators of the device TRM. 5.11.5.22 Timers For more details about features and additional description information on the device Timers, see the corresponding sections within Section 4.3, Signal Descriptions and Section 6, Detailed Description. Table 5-120, Table 5-121 and Figure 5-129 present timings and switching characteristics of the Timers. Table 5-120. Timing Requirements for Timers NO. PARAMETER DESCRIPTION MODE MIN MAX UNIT T1 tw(TINPH) Pulse duration, high CAPTURE 5 + 4P(1) ns T2 tw(TINPL) Pulse duration, low CAPTURE 5 + 4P(1) ns (1) P = functional clock period in ns. Table 5-121. Switching Characteristics for Timers NO. PARAMETER DESCRIPTION MODE MIN MAX UNIT T3 tw(TOUTH) Pulse duration, high PWM -3 + 4P(1) ns T4 tw(TOUTL) Pulse duration, low PWM -3 + 4P(1) ns (1) P = functional clock period in ns. Figure 5-129. Timer Timing For more information, see section Timers in chapter Peripherals of the device TRM. |
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