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データシートサーチシステム |
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データシートサーチシステム |
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GD25LE256DFJS データシート(PDF) 75 Page - GigaDevice Semiconductor (Beijing) Inc. |
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GD25LE256DFJS データシート(HTML) 75 Page - GigaDevice Semiconductor (Beijing) Inc. |
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75 / 83 page  1.8V Uniform Sector Dual and Quad Serial Flash GD25LE256D 75 (T= -40℃~125℃, VCC=1.65~2.0V, CL=30pf) Symbol Parameter Min. Typ. Max. Unit. fC Serial Clock Frequency For: all command except for 03H 104 MHz fR Serial Clock Frequency For: Read (03H) 80 MHz tCLH Serial Clock High Time 4.0 ns tCLL Serial Clock Low Time 4.0 ns tCLCH Serial Clock Rise Time (Slew Rate) 0.2 V/ns tCHCL Serial Clock Fall Time (Slew Rate) 0.2 V/ns tSLCH CS# Active Setup Time 5 ns tCHSH CS# Active Hold Time 5 ns tSHCH CS# Not Active Setup Time 5 ns tCHSL CS# Not Active Hold Time 5 ns tSHSL CS# High Time (Read/Write) 20 ns tSHQZ Output Disable Time 6 ns tCLQX Output Hold Time 1.2 ns tDVCH Data In Setup Time 2 ns tCHDX Data In Hold Time 2 ns tHLCH HOLD# Low Setup Time (Relative To Clock) 5 ns tHHCH HOLD# High Setup Time (Relative To Clock) 5 ns tCHHL HOLD# High Hold Time (Relative To Clock) 5 ns tCHHH HOLD# Low Hold Time (Relative To Clock) 5 ns tHLQZ HOLD# Low To High-Z Output 6 ns tHHQX HOLD# High To Low-Z Output 6 ns tCLQV Clock Low To Output Valid 7 ns tWHSL Write Protect Setup Time Before CS# Low 20 ns tSHWL Write Protect Hold Time After CS# High 100 ns tRST CS# High To Next Command After Reset (Except From Erase) 30 μs tRST_E CS# High To Next Command After Reset (From Erase) 12 ms tDP CS# High To Deep Power-Down Mode 20 μs tRES1 CS# High To Standby Mode Without Electronic Signature Read 20 μs tRES2 CS# High To Standby Mode With Electronic Signature Read 20 μs tSUS CS# High To Next Command After Suspend 20 μs tRS Latency Between Resume And Next Suspend 100 μs tW Write Status Register Cycle Time 10 60 ms tPP Page Programming Time 0.5 4 ms tSE Sector Erase Time 70 500 ms tBE Block Erase Time (32K Bytes) 0.16 1.5 s tBE Block Erase Time (64K Bytes) 0.3 3.0 s tCE Chip Erase Time (GD25LE256D) 100 300 s Note: 1. Typical values given for TA=25°C. 2. Value guaranteed by design and/or characterization, not 100% tested in production. |
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