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STM8S データシート(PDF) 217 Page - STMicroelectronics

部品番号 STM8S
部品情報  STM8S Series and STM8AF Series 8-bit microcontrollers
PDF  467 Pages
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メーカー  STMICROELECTRONICS [STMicroelectronics]
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STM8S データシート(HTML) 217 Page - STMicroelectronics

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RM0016
16-bit advanced control timer (TIM1)
261
17.7.31
Deadtime register (TIM1_DTR)
Address offset: 0x1E
Reset value: 0x00
7
654
3210
DTG7:0]
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Bits 7:0 DTG[7:0]: Deadtime generator set-up
This bitfield defines the duration of the deadtime inserted between the complementary outputs. DT
corresponds to this duration. tCK_PSC is the TIM1 clock pulse.
DTG[7:5] = 0xx => DT= DTG[7:0] x tdtg with tdtg = tCK_PSC (f1)
DTG[7:5] = 10x => DT= (64 + DTG[5:0]) x tdtg with tdtg= 2 x tCK_PSC (f2)
DTG[7:5] = 110 => DT = (32 + DTG[4:0]) x tdtg with tdtg= 8 x tCK_PSC (f3)
DTG[7:5] = 111 => DT = (32 + DTG[4:0]) x tdtg with tdtg = 16 x tCK_PSC (f4)
Example
If tCK_PSC= 125 ns (8 MHz), deadtime possible values are:
DTG[7:0] = 0 x 0 to 0 x 7F from 0 to 15875 ns in 125 ns steps (refer to f1)
DTG[7:0] = 0 x 80 to 0 x BF from 16 µs to 31750 ns in 250 ns steps (refer to f2)
DTG[7:0] = 0 x C0 to 0 x DF from 32 µs to 63 µs in 1µs steps (refer to f3)
DTG[7:0] = 0 x E0 to 0 x FF from 64 µs to 126 µs in 2 µs steps (refer to f4)
Note: This bitfield can not be modified while LOCK level 1, 2, or 3 have been programmed (LOCK bits
in the TIM1_BKR register).



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