STM8S datasheet(218/467 Pages) STMICROELECTRONICS

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16-bit advanced control timer (TIM1)

RM0016

218/467

DocID14587 Rev 14

17.7.32

Output idle state register (TIM1_OISR)

Address offset: 0x1F

Reset value: 0x00

654

3210

Reserved

OIS4

OIS3N

OIS3

OIS2N

OIS2

OIS1N

OIS1

rwrw

Bit 7 Reserved, forced by hardware to 0

Bit 6 OIS4: Output idle state 4 (OC4 output)

Refer to OIS1 bit

Bit 5 OIS3N: Output idle state 3 (OC3N output)

Refer to OIS1N bit

Bit 4 OIS3: Output idle state 3 (OC3 output)

Refer to OIS1 bit

Bit 3 OIS2N: Output idle state 2 (OC2N output)

Refer to OIS1N bit

Bit 2 OIS2: Output idle state 2 (OC2 output)

Refer to OIS1 bit

Bit 1 OIS1N: Output idle state 1 (OC1N output).

0: OC1N = 0 after a deadtime when MOE = 0

1: OC1N = 1 after a deadtime when MOE = 0

Note: This bit can no longer be modified while LOCK level 1, 2 or 3 have been programmed (LOCK

bits in the TIM1_BKR register).

Bit 0 OIS1: Output idle state 1 (OC1 output).

0: OC1=0 (after a deadtime if OC1N is implemented) when MOE=0

1: OC1=1 (after a deadtime if OC1N is implemented) when MOE=0

Note: This bit can no longer be modified while LOCK level 1, 2 or 3 have been programmed (LOCK

bits in the TIM1_BKR register).

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