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STM8S データシート(PDF) 437 Page - STMicroelectronics

部品番号 STM8S
部品情報  STM8S Series and STM8AF Series 8-bit microcontrollers
PDF  467 Pages
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メーカー  STMICROELECTRONICS [STMicroelectronics]
ホームページ  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

STM8S データシート(HTML) 437 Page - STMicroelectronics

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RM0016
Analog/digital converter (ADC)
454
24.6
ADC low power modes
The ADC does not have the capability to wake the device from Active-halt or Halt mode.
24.7
ADC interrupts
The ADC interrupt control bits are summarized in Table 74, Table 75 and Table 76
Table 73. Low power modes
Mode
Description
Wait
No effect on ADC
Halt/
Active-halt
In devices with extended features, the ADC is automatically switched off
before entering Halt/Active-halt mode. After waking up from Active-halt, the
ADON bit must be set by software to power on the ADC, and a delay of 7 µs
is needed before starting a new conversion.
Table 74. ADC Interrupts in single and non-buffered continuous mode (ADC1 and ADC2)(1)
Enable bits
Status flags
Exit
from
Wait
Exit
from
Halt
AWSx
AWDG
EOC
Don’t
care
0
0
Don’t care
Flag is set if the channel
crosses the
programmed thresholds.
Flag is set at the end of
each conversion.
No
No
0
1
Flag is set if the channel
crosses the
programmed thresholds.
Flag is set at the end of
each conversion and an
interrupt is generated.
Yes
No
1
0
Flag is set if the channel
crosses the
programmed thresholds.
An interrupt is
generated but
continuous conversion
is not stopped.
Flag is set at the end of
each conversion.
Yes
No
1
1
Flag is set if the channel
crosses the
programmed thresholds.
An interrupt is
generated but
continuous conversion
is not stopped.
Flag is set at the end of
each conversion and an
interrupt is generated.
Yes
no
1. BSIZE = Data buffer size (8 or 10 depending on the product).



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