STM8S datasheet(439/467 Pages) STMICROELECTRONICS

439 / 467 page

DocID14587 Rev 14

439/467

RM0016

Analog/digital converter (ADC)

454

Table 76. ADC interrupts in scan mode (ADC1)

Control bits

Status bits

Exit

from

Wait

Exit

from

Halt

AWSx

AWD

EOC

Don’t

care

The flag is set at the end

of the scan sequence

Don’t

care

The flag is set at the end

of the scan sequence

and an interrupt is

generated.

Yes

Flag is set if conversion

on channel ”x” crosses

the thresholds

programmed in the

ADC_HTR and

ADC_LTR registers

The flag is set at the end

of the scan sequence if

at least one of the

AWSx bits is set

The flag is set at the end

of the scan sequence

The flag is set and an

interrupt is generated at

the end of the SCAN

sequence if at least one

of the AWSx bits is set.

SCAN conversion is not

stopped.

The flag is set to 1 at the

end of the scan

sequence

Yes

The flag is set at the end

of the scan sequence if

at least one of the

AWSx bits is set

The flag is set to 1 at the

end of the scan

sequence and an

interrupt is generated.

Yes

The flag is set

immediately as soon as

one of the AWSx bits is

set. In interrupt is

generated and scan

conversion is stopped.

The flag is set at the end

of the scan sequence

and an interrupt is

generated.

Yes

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