STM8S datasheet(438/467 Pages) STMICROELECTRONICS

438 / 467 page

Analog/digital converter (ADC)

RM0016

438/467

DocID14587 Rev 14

Table 75. ADC interrupts in buffered continuous mode (ADC1)

Enable bits

Status flags

Exit

from

Wait

Exit

from

Halt

AWSx

AWD

EOC

Don’t

care

The flag is set at the end

of BSIZE conversions

Don’t

care

The flag is set at the end

of BSIZE conversions

and an interrupt is

generated.

Yes

Flag is set if conversion

on buffer ”x” crosses the

thresholds programmed

in the ADC_HTR and

ADC_LTR registers

The flag is set at the end

of BSIZE conversions if

at least one of the

AWSx bits is set

The flag is set at the end

of BSIZE conversions

(Data Buffer Full)

The flag is set and an

interrupt is generated at

the end of BSIZE

conversions if at least

one of the AWSx bits is

set. Continuous

conversion is not

stopped.

Yes

The flag is set at the end

of BSIZE conversions if

at least one of the

AWSx bits is set

The flag is set at the end

of BSIZE conversions

and an interrupt is

generated.

Yes

The flag is set

immediately as soon as

one of the AWSx bits is

set. In interrupt is

generated and

continuous conversion

is stopped.

The flag is set at the end

of BSIZE conversions

and an interrupt is

generated.

Yes

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