SH7041A datasheet(387/923 Pages) RENESAS

部品番号	SH7041A

部品情報	Renesas 32-Bit Single-Chip RISC Microprocessor SuperH RISC engine Family/SH7040 Series(CPU Core SH-2)

PDF	923 Pages

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メーカー	RENESAS [Renesas Technology Corp]

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387 / 923 page

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4.When performing brushless DC motor control, set bit BDC in the timer gate control register

(TGCR) and set the feedback signal input source and output chopping or gate signal direct

output.

5.Reset TCNT3 and TCNT4 to H'0000.

6. TGR3A is the period register. Set the waveform period value in TGR3A. Set the transition

times of the PWM output waveforms in TGR3B, TGR4A, and TGR4B. Set times within the

compare-match range of TCNT3. X

≤ TGR3A (X: set value). With X = TGRA (cycle = duty

cycle), the output waveform goes into toggle operation at the point where TCNT3 = TGR3A =

7.Select enabling/disabling of toggle output synchronized with the PMW cycle using bit PSYE

in the timer output control register (TOCR), and set the PWM output level with bits OLSP and

OLSN.

8.Set bits MD3–MD0 in TMDR3 to B'1000 to select the reset-synchronized PWM mode.

TIOC3B, TIOC3D, TIOC4A, TIOC4B, TIOC4C, and TIOC4D become PWM output pins.

9.Set the CST3 bit in the TSTR to 1 to start the count operation.

10.Set the STR3 bit in the TSTR to 1 to let the TCNT3 start counting.

SH7041A データシート(PDF) 387 Page - Renesas Technology Corp