ST25R3916B-AQWT datasheet(98/165 Pages) STMICROELECTRONICS

98 / 165 page

Application information

ST25R3916B ST25R3917B

98/165

DS13541 Rev 7

4.5.28

Squelch timer register

Address: 0Fh

Type: RW

4.5.29

NFC field on guard timer register

Address: 15h

Type: RW

Table 56. Squelch timer register

Bit

Name

Default

Function

Comments

7sqt7

Squelch Timer

Step, Range: same as Mask

receive timer register, including

mrt_step selection

Squelch is enabled ~20 μs after the end of

reader data transmission

– sqt<7:0> > 5:

Squelch stops after the time defined by

sqt<7:0>. Gain reduction due to squelch is

locked and used as a starting point for AGC.

–Sqt<7:0> ≤ 5 or sqt<7:0> ≥ mrt<7:0>:

Squelch is enabled until the MRT expires.

6sqt6

5sqt5

4sqt4

3sqt3

2sqt2

1sqt1

0sqt0

Table 57. NFC field on guard timer register

Bit

Name

Default

Function

Comments

7nfc_gt7

NFC field on guard timer

Step: 2048 / fc (151 μs)

Range: 38.66 ms

Used by NFC field on commands.

The value nfc_gt<7:0> is added to the initial

75 μs in TIRFG and TARFG.

Set to 33 for TIRFG (75 μs + 4.984 ms= 5.06 ms)

Set to 0 for TARFG (75 μs + 0 ms = 75 μs)

6nfc_gt6

5nfc_gt5

4nfc_gt4

3nfc_gt3

2nfc_gt2

1nfc_gt1

0nfc_gt0

ST25R3916B-AQWT データシート(PDF) 98 Page - STMicroelectronics

ST25R3916B-AQWT データシート(HTML) 98 Page - STMicroelectronics

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

データシートダウンロード