データシートサーチシステム
  Japanese  ▼
ALLDATASHEET.JP

X  

Preview PDF HTML

CS5305GDWR28 データシート(PDF) 18 Page - ON Semiconductor

部品番号 CS5305GDWR28
部品情報  Three?뭁hase Synchronous Switching Step?묭own Controller with Single Wire Current Sharing
PDF  33 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
メーカー  ONSEMI [ON Semiconductor]
ホームページ  http://www.onsemi.com
Logo ONSEMI - ON Semiconductor

CS5305GDWR28 データシート(HTML) 18 Page - ON Semiconductor

Back Button CS5305GDWR28 Datasheet HTML 14Page - ON Semiconductor CS5305GDWR28 Datasheet HTML 15Page - ON Semiconductor CS5305GDWR28 Datasheet HTML 16Page - ON Semiconductor CS5305GDWR28 Datasheet HTML 17Page - ON Semiconductor CS5305GDWR28 Datasheet HTML 18Page - ON Semiconductor CS5305GDWR28 Datasheet HTML 19Page - ON Semiconductor CS5305GDWR28 Datasheet HTML 20Page - ON Semiconductor CS5305GDWR28 Datasheet HTML 21Page - ON Semiconductor CS5305GDWR28 Datasheet HTML 22Page - ON Semiconductor Next Button
Zoom Inzoom in Zoom Outzoom out
 18 / 33 page
background image
CS5305
http://onsemi.com
18
200
160
120
80
40
100
60
20
−20
−60
100
1.0 k
10 k
100 k
Frequency in Hz
2
21
1
Figure 29. Error Amplifier Frequency
Response with No Compensation
80
40
0
−40
−80
170
150
130
110
90
10
100
1.0 k
10 k
Frequency in Hz
Figure 30. Error Amplifier Frequency
Response with 0.1 mF Capacitor
2
21
1
Soft Start/Hiccup Mode
At initial power−up, the COMP voltage is zero. The total
COMP capacitance will begin to charge with a typical
current of 30 μA. (There may be more than one capacitor
connected between COMP and ground depending on the
adaptive voltage positioning compensation.) All GATE
outputs are held low until the COMP voltage reaches 0.6 V.
Once this threshold is reached, the GATE outputs are
released to operate normally. In hiccup−mode, this will
result in GATE pulses being generated until the module
overcurrent condition reoccurs, and the discharge/Soft Start
cycle begins anew.
Undervoltage Lockout
The CS5305 includes an under−voltage lockout circuit.
This circuit disables the output drivers until VCC applied to
the IC reaches a typical value of 9 V. The GATE outputs are
disabled when VCC drops below 8 V typical.
Enable
The CS5305 has a dedicated enable pin, in accordance with
the latest VRM specifications. This pin is internally pulled up
to a 3.3 V rail through a blocking diode and a 50 kΩ resistor.
The blocking diode allows external pull up to a bias voltage
greater than 3.3 V but below 13 V.
Fault Protection Logic
The
CS5305
is
equipped
with
sophisticated
fault−detection and protection circuitry to ensure proper
operation in a paralleled VRM environment. In such an
environment, any one of several distinct failures could not
only destroy the VRM that sees the fault, but also those
VRMs that are connected in parallel with the faulted VRM.
Table 1 describes the fault logic circuitry, shown below in
Figure 31.
VID FAULT
ENABLE
UVLO
S
R
COMP
DISCHG’D?
S
R
OVC
LOCAL
FAULT
LATCH
SHARE
FAULT
LATCH
SHARE
BUS
HIGH?
FAULT
SHARE
FAULT
Figure 31. Fault Logic Circuitry



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33


データシート ダウンロード

Go To PDF Page


リンク URL



ALLDATASHEETはお客様のビジネスに役立ちますか？  [ DONATE ] 

Alldatasheetは   |   広告   |   お問い合わせ   |   プライバシーポリシー   |   データシートへのリンク    |   リンク交換   |   メーカーリスト
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com