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DP83867CS データシート(PDF) 57 Page - Texas Instruments

部品番号 DP83867CS
部品情報  DP83867E/IS/CS Robust, High Immunity, Small Form Factor 10/100/1000 Ethernet Physical Layer Transceiver
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7.6.12.1 Register Control Register (REGCR)
This register is the MDIO Manageable MMD access control. In general, register REGCR (4:0) is the device
address DEVAD that directs any accesses of the ADDAR (0x000E) register to the appropriate MMD. REGCR
also contains selection bits for auto increment of the data register. This register contains the device address
to be written to access the extended registers. Write 0x1F into bits 4:0 of this register. REGCR also contains
selection bits (15:14) for the address auto-increment mode of ADDAR.
Table 7-21. Register Control Register (REGCR), Address 0x000D
BIT
BIT NAME
DEFAULT
DESCRIPTION
15:14
Function
0, RW
00 = Address
01 = Data, no post increment
10 = Data, post increment on read and write
11 = Data, post increment on write only
13:5
RESERVED
0, RO
RESERVED: Writes ignored, read as 0.
4:0
DEVAD
0, RW
Device Address: In general, these bits [4:0] are the device address
DEVAD that directs any accesses of ADDAR register (0x000E) to the
appropriate MMD. Specifically, the DP83867 uses the vendor specific
DEVAD [4:0] = 11111 for accesses. All accesses through registers
REGCR and ADDAR can use this DEVAD. Transactions with other
DEVAD are ignored.
7.6.12.2 Address or Data Register (ADDAR)
This register is the address/data MMD register. ADDAR is used in conjunction with REGCR register (0x000D) to
provide the access by indirect read/write mechanism to the extended register set.
Table 7-22. Address or Data Register (ADDAR) address 0x000E
BIT
BIT NAME
DEFAULT
DESCRIPTION
15:0
Address / Data
0, RW
If REGCR register 15:14 = 00, holds the MMD DEVAD's address
register, otherwise holds the MMD DEVAD's data register
7.6.13 1000BASE-T Status Register (1KSCR)
Table 7-23. 1000BASE-T Status Register (1KSCR) address 0x000F
BIT
BIT NAME
DEFAULT
DESCRIPTION
15
1000BASE-X FULL DUPLEX
0, RO/P
1000BASE-X Full Duplex Support:
1 = 1000BASE-X Full Duplex is supported by the local device.
0 = 1000BASE-X Full Duplex is not supported by the local device.
14
1000BASE-X HALF DUPLEX
0, RO/P
1000BASE-X Half Duplex Support:
1 = 1000BASE-X Half Duplex is supported by the local device.
0 = 1000BASE-X Half Duplex is not supported by the local device.
13
1000BASE-T FULL DUPLEX
1, RO/P
1000BASE-T Full Duplex Support:
1 = 1000BASE-T Full Duplex is supported by the local device.
0 = 1000BASE-T Full Duplex is not supported by the local device.
12
1000BASE-T HALF DUPLEX
1, RO/P
1000BASE-T Half Duplex Support:
1 = 1000BASE-T Half Duplex is supported by the local device.
0 = 1000BASE-T Half Duplex is not supported by the local device.
11:0
RESERVED
00, RO
RESERVED by IEEE: Writes ignored, read as 0.
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DP83867CS, DP83867IS, DP83867E
SNLS504F – OCTOBER 2015 – REVISED JANUARY 2025
Copyright © 2025 Texas Instruments Incorporated
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