7733 datasheet(18/940 Pages) RENESAS

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7735 Group User’s Manual

Table of contents

CHAPTER 12. CONNECTING EXTERNAL DEVICES

12.1 Signals required for accessing external devices ...................................................... 12-3

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12.1.1 External bus (A0/D0 to A15/D15, A16 and A17) and chip select signals (CS0 to CS4) .................... 12-6

12.1.2 External data bus width selection signal (Pin BYTE’s level) ................................ 12-8

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12.1.3 Read enable signal (RDE) and Write enable signals (WEL, WEH) ................... 12-8

12.1.4 Address latch enable signal (ALE) ...........................................................................12-8

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12.1.5 Signals related to ready function (RDY, RSMP) ................................................... 12-8

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12.1.6 Signals related to hold function (HOLD, HLDA) .................................................... 12-8

12.1.7 Clock

φ1 ....................................................................................................................... 12-8

12.1.8 Operation of bus interface unit (BIU) ................................................................... 12-12

12.2 Software wait .................................................................................................................... 12-16

12.3 Ready function ................................................................................................................. 12-19

12.3.1 Operation in ready state .......................................................................................... 12-20

12.4 Hold function .................................................................................................................... 12-23

12.4.1 Operation in hold state ............................................................................................ 12-24

CHAPTER 13. RESET

13.1 Hardware reset ................................................................................................................... 13-2

13.2 Software reset ................................................................................................. 13-12 in part 1

CHAPTER 14. CLOCK GENERATING CIRCUIT

14.1 Overview ............................................................................................................ 14-2 in part 1

14.2 Oscillation circuit example ............................................................................ 14-3 in part 1

14.3 Clock control ...................................................................................................................... 14-2

CHAPTER 15. ELECTRICAL CHARACTERISTICS

15.1 Absolute maximum ratings ........................................................................... 15-2 in part 1

15.2 Recommended operating conditions .......................................................... 15-3 in part 1

15.3 Electrical characteristics ............................................................................... 15-4 in part 1

15.4 A-D converter characteristics ....................................................................... 15-5 in part 1

15.5 Internal peripheral devices ............................................................................ 15-6 in part 1

15.6 Ready and Hold ................................................................................................................. 15-3

15.7 Single-chip mode ........................................................................................... 15-13 in part 1

15.8 Memory expansion mode and microprocessor mode : with no wait ................... 15-5

15.9 Memory expansion mode and microprocessor mode : with wait 1 ..................... 15-7

15.10 Memory expansion mode and microprocessor mode : with wait 0 ................... 15-9

15.11 Testing circuit for ports P0 to P8,

φ 1, and E...................................... 15-21 in part 1

CHAPTER 16. STANDARD CHARACTERISTICS

16.1 Standard characteristics ................................................................................... 16-2 in part 1

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