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7733 データシート(PDF) 33 Page - Renesas Technology Corp

部品番号 7733
部品情報  16-BIT SINGLE-CHIP MICROCOMPUTER
PDF  940 Pages
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メーカー  RENESAS [Renesas Technology Corp]
ホームページ  http://www.renesas.com
Logo RENESAS - Renesas Technology Corp

7733 データシート(HTML) 33 Page - Renesas Technology Corp

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OVERVIEW
1-6
7733 Group User’s Manual
1.3 Pin description
Table 1.3.2 Pin description (2)
Input/Output
I/O
Output
I/O
I/O
I/O
Output
Functions
[Single-chip Mode]
P0 is an 8-bit CMOS I/O port and has an I/O direction
register. Each pin can be programmed for input or output.
[Memory Expansion Mode] [Microprocessor Mode]
Address’s low-order 8 bits (A0–A7) are output.
[Single-chip Mode]
P1 is an 8-bit I/O port with the same function as port
P0.
[Memory Expansion Mode] [Microprocessor Mode]
q When the external data bus width = 8 bits
(Pin BYTE is at “H” level)
Address’s middle-order 8 bits (A8–A15) are output.
q When the external data bus width = 16 bits
(Pin BYTE is at “L” level)
Input/Output of data (D8–D15) and output of address’s
middle-order 8 bits (A8–A15) are performed with the
time sharing method.
[Single-chip Mode]
P2 is an 8-bit I/O port with the same function as port
P0.
[Memory Expansion Mode] [Microprocessor Mode]
Input/Output of data (D0–D7) and output of address’s
high-order 8 bits (A16–A23) are performed with the time
sharing method.
[Single-chip Mode]
P3 is a 4-bit I/O port with the same function as port P0.
[Memory Expansion Mode] [Microprocessor Mode]
__
____
These pins respectively output signals R/W, BHE, ALE,
_____
and HLDA.
__
q Signal R/W
This signal indicates the data bus state.
When this signal level is “H,” a data bus is in the
read state. When this signal level is “L,” a data bus
is in the write state.
____
q Signal BHE
This signal’s level is “L” when the microcomputer
accesses an odd address.
q Signal ALE
This signal is used to separate the multiplexed signal which
consists of an address and data to the address and the data.
_____
q Signal HLDA
This signal informs the external whether this
microcomputer enters the Hold state or not.
_____
In Hold state, pin HLDA outputs “L” level.
Name
I/O port P0
I/O port P1
I/O port P2
I/O port P3
Pin
P00–P07
A0–A7
P10–P17
A8/D8
A15/D15
P20–P27
A16/D0
A23/D7
P30–P33
__
R/W,
____
BHE
,
ALE,
_____
HLDA



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