TAS5708 datasheet(15/56 Pages) TI

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−100

−90

−80

−70

−60

−50

−40

f − Frequency − Hz

G015

100

10k

20k

Left to Right

Right to Left

PO = 1 W

PVCC = 24 V

RL = 8 Ω

DETAILED DESCRIPTION

POWER SUPPLY

TAS5708

www.ti.com ........................................................................................................................................................................................... SLOS570 – DECEMBER 2008

TYPICAL CHARACTERISTICS, BTL CONFIGURATION (continued)

CROSSTALK

FREQUENCY

Figure 17.

To facilitate system design, the TAS5708 needs only a 3.3-V supply in addition to the 10-V to 26-V power-stage

supply. An internal voltage regulator provides suitable voltage levels for the gate drive circuitry. Additionally, all

circuitry requiring a floating voltage supply, e.g., the high-side gate drive, is accommodated by built-in bootstrap

circuitry requiring only a few external capacitors.

In order to provide good electrical and acoustical characteristics, the PWM signal path for the output stage is

designed as identical, independent half-bridges. For this reason, each half-bridge has separate bootstrap pins

(BST_X), and power-stage supply pins (PVCC_X). The gate drive voltages (VCLAMP_AB and VCLAMP_CD) are

derived from the PVCC voltage. Special attention should be paid to placing all decoupling capacitors as close to

their associated pins as possible. In general, inductance between the power-supply pins and decoupling

capacitors must be avoided.

For a properly functioning bootstrap circuit, a small ceramic capacitor must be connected from each bootstrap pin

(BST_X) to the power-stage output pin (OUT_X). When the power-stage output is low, the bootstrap capacitor is

charged through an internal diode connected between the gate-drive regulator output pin (VCLAMP_X) and the

bootstrap pin. When the power-stage output is high, the bootstrap capacitor potential is shifted above the output

potential and thus provides a suitable voltage supply for the high-side gate driver. In an application with PWM

switching frequencies in the range from 352 kHz to 384 kHz, it is recommended to use 220-nF ceramic

capacitors, size 0603 or 0805, for the bootstrap supply. These 220-nF capacitors ensure sufficient energy

storage, even during minimal PWM duty cycles, to keep the high-side power stage FET (LDMOS) fully turned on

during the remaining part of the PWM cycle.

Special attention should be paid to the power-stage power supply; this includes component selection, PCB

placement, and routing. As indicated, each half-bridge has independent power-stage supply pins (PVCC_X). For

optimal electrical performance, EMI compliance, and system reliability, it is important that each PVCC_X pin is

decoupled with a 100-nF ceramic capacitor placed as close as possible to each supply pin.

The TAS5708 is fully protected against erroneous power-stage turnon due to parasitic gate charging.

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