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DP35DP データシート(PDF) 77 Page - Intel Corporation |
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DP35DP データシート(HTML) 77 Page - Intel Corporation |
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77 / 84 page ![]() Regulatory Compliance and Battery Disposal Information 77 Table 40 shows the various forms of the “Lead-Free 2nd Level Interconnect” mark as it appears on the board and accompanying collateral. Table 40. Lead-Free Board Markings Description Mark Lead-Free 2nd Level Interconnect: This symbol is used to identify electrical and electronic assemblies and components in which the lead (Pb) concentration level in the desktop board substrate and the solder connections from the board to the components (second-level interconnect) is not greater than 0.1% by weight (1000 ppm). or or |
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