DP35DP datasheet(37/84 Pages) INTEL

37 / 84 page

Technical Reference

What This Chapter Contains

2.1 Memory Map................................................................................... 37

2.2 Connectors and Headers................................................................... 40

2.3 Jumper Block .................................................................................. 51

2.4 Mechanical Considerations ................................................................ 52

2.5 Electrical Considerations................................................................... 53

2.6 Thermal Considerations .................................................................... 54

2.7 Reliability ....................................................................................... 56

2.8 Environmental ................................................................................ 56

2.1

Memory Map

2.1.1

Addressable Memory

The board utilizes 8 GB of addressable system memory. Typically the address space

that is allocated for PCI Conventional bus add-in cards, PCI Express configuration

space, BIOS (SPI Flash), and chipset overhead resides above the top of DRAM (total

system memory). On a system that has 8 GB of system memory installed, it is not

possible to use all of the installed memory due to system address space being

allocated for other system critical functions. These functions include the following:

•

BIOS/ SPI Flash (8 Mbits)

•

Local APIC (19 MB)

•

Digital Media Interface (40 MB)

•

Front side bus interrupts (17 MB)

•

PCI Express configuration space (256 MB)

•

MCH base address registers, internal graphics ranges, PCI Express ports (up to

512 MB)

•

Memory-mapped I/O that is dynamically allocated for PCI Conventional and PCI

Express add-in cards

•

Base graphics memory support (1 MB or 8 MB)

•

Intel Management Engine Interface single channel (8 MB) or dual channel (16 MB)

DP35DP データシート(PDF) 37 Page - Intel Corporation

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