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MRF49XA-I/T データシート(PDF) 37 Page - Microchip Technology |
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MRF49XA-I/T データシート(HTML) 37 Page - Microchip Technology |
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37 / 102 page  © 2009-2011 Microchip Technology Inc. Preliminary DS70590C-page 37 MRF49XA bit 0 CLKOEN: Clock Output Enable bit On-chip Reset or power-up clock output is enabled so that a processor can execute any special setup sequences as required by the designer(2). 1 = Disables the clock output 0 = Enables the clock output(4) REGISTER 2-13: PMCREG: POWER MANAGEMENT CONFIGURATION REGISTER (POR: 0x8208) (CONTINUED) Note 1: This bit can be disabled to reduce current consumption. 2: See BCSREG (Register 2-16) for programming details. 3: See WTSREG (Register 2-14) for details on programming the wake-up timer value. 4: If the CLKOEN bit is cleared by enabling the clock output, the oscillator continues to run even if the OSCEN bit is cleared. The device will not fully enter into the Sleep mode. |
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