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MRF49XA-I/T データシート(PDF) 75 Page - Microchip Technology |
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MRF49XA-I/T データシート(HTML) 75 Page - Microchip Technology |
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75 / 102 page ![]() © 2009-2011 Microchip Technology Inc. Preliminary DS70590C-page 75 MRF49XA The following guidelines explain the requirements of the above mentioned layers. • It is important to keep the original PCB thickness, since any change will affect antenna performance (see total thickness of dielectric) or microstrip lines’ characteristic impedance. • For good transmit and receive performance, the trace lengths at RF pins must be kept as short as possible. Using small, surface mount components (in 0402/0603 package) yields good performance and keeps the RF circuit small. RF connections should be short and direct. • Except for the antenna layout, avoid sharp corners since they can act as an antenna. Round corners will eliminate possible future EMI problems. • Digital lines are prone to be very noisy when handling periodic waveforms and fast clock/switching rates. Avoid RF signal layout close to any of the digital lines. • A VIA filled ground patch underneath the IC transceiver is mandatory. • Power supply must be distributed to each pin in a star topology and low-ESR capacitors must be placed at each pin for proper decoupling noise. • Thorough decoupling on each power pin is beneficial for reducing in-band transceiver noise, particularly when this noise degrades perfor- mance. Usually, low value caps (27 pF – 47 pF) combined with large value caps (100 nF) will cover a large spectrum of frequency. • Passive component (inductors) should be in the high-frequency category and the Self Resonant Frequency (SRF) should be at least two times higher than the operating frequency. • The additional trace length affects the crystal oscillator by adding parasitic capacitance to the overall load of the crystal. To minimize this, place the crystal as close as possible to the RF device. • Setting short and direct connections between the components on board minimizes the effects of “frequency pulling” that might be introduced by stray capacitance. It even allows the internal load capacitance of the chip to be more effective in properly loading the crystal oscillator circuit. • Long run tracks of clock signal may radiate and cause interference. This can degrade receiver performance and add harmonics or unwanted modulation to the transmitter. • Keep clock connections as short as possible and surround the clock trace with an adjacent ground plane pour. Pouring helps in reducing any radiation or crosstalk due to long run traces of the clock signal. • Low value decoupling capacitors, typically 0.01 μF – 0.1 μF, should be placed for VDD of the chip and for bias points of the RF circuit. • High value decoupling capacitors, typically 2.2 μF – 10 μF, should be placed at the point where power is applied to the PCB. • Power supply bypassing is necessary. Poor bypassing contributes to conducted interference which can cause noise and spurious signals to couple into the RF sections, significantly reducing performance. |
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