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LT1956/LT1956-5

1956f

APPLICATIO S I FOR ATIO

Boost current loss:

BOOST

OUT

()

Quiescent current loss:

OUT

()+

()

0 0015

0 003

RSW = switch resistance (≈0.3) hot

tEFF = effective switch current/voltage overlap time

= (tr + tf + tIr + tIf)

tr = (VIN/1.2)ns

tf = (VIN/1.7)ns

tIr = tIf = (IOUT/0.05)ns

f = switch frequency

Example: with VIN = 12V, VOUT = 5V and IOUT = 1A:

BOOST

= ()( ) ( ) +

()()()( )()

= () () =

()+ () =

−

03 1

57 10

1 2 1 12 500 10

0 125 0 171 0 296

51 36

0 058

12 0 0015

5 0 003

0 033

•/

•

Total power dissipation in the IC is given by:

PTOT = PSW + PBOOST + PQ

= 0.296W + 0.058W + 0.033W = 0.39W

Thermal resistance for the LT1956 packages is influenced

by the presence of internal or backside planes.

SSOP (GN16) Package: With a full plane under the GN16

package, thermal resistance will be about 85

°C/W.

TSSOP (Exposed Pad) Package: With a full plane under the

TSSOP package, thermal resistance (

θJA) will be about

°C/W.

To calculate die temperature, use the proper thermal

resistance (

θJA) number for the desired package an add in

worst-case ambient temperature:

TJ = TA + (θJA • PTOT)

When estimating ambient, remember the nearby catch

diode and inductor will also be dissipating power.

DIODE

OUT

LOAD

( )(

–

)(

)

VF = Forward voltage of diode (assume 0.63V at 1A)

DIODE ==

)(

– )( )

063 12 5 1

037

Notice that the catch diode’s forward voltage contributes

a significant loss in the overall system efficiency. A larger,

low VF diode can improve efficiency by several percent.

PINDUCTOR = (ILOAD)(LDCR)

LDCR = inductor DC resistance (assume 0.1Ω)

PINDUCTOR = (1)(0.1) = 0.1W

Typical thermal resistance of the board is 10

°C/W. Taking

the catch diode and inductor power dissipation into ac-

count and using the example calculations for LT1956 dis-

sipation, the LT1956 die temperature will be estimated as:

TJ = TA + (θJA • PTOT) + (10 • [PDIODE + PINDUCTOR])

With the GN16 package (

θJA = 85°C/W), at an ambient

temperature of 70

°C:

TJ = 70 + (85 • 0.39) + (10 • 0.47) = 108°C

With the TSSOP package (

θJA = 45°C/W) at an ambient

temperature of 70

°C:

TJ = 70 + (45 • 0.37) + (10 • 0.47) = 91°C

Die temperature can peak for certain combinations of

VIN, VOUT and load current. While higher VIN gives greater

switch AC losses, quiescent and catch diode losses, a

lower VIN may generate greater losses due to switch DC

losses. In general, the maximum and minimum VIN levels

should be checked with maximum typical load current for

calculation of the LT1956 die temperature. If a more

accurate die temperature is required, a measurement of

the SYNC pin resistance (to GND) can be used. The SYNC

pin resistance can be measured by forcing a voltage no

greater than 0.5V at the pin and monitoring the pin

current over temperature in a oven. This should be done

with minimal device power (low VIN and no switching

[VC = 0V]) in order to calibrate SYNC pin resistance with

ambient (oven) temperature.

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