TAS5731MPHPR datasheet(49/68 Pages) TI1

49 / 68 page

TAS5731M

www.ti.com

SLOS838B – JULY 2013 – REVISED NOVEMBER 2013

SYSTEM CONTROL REGISTER 2 (0x05)

When bit D6 is set low, the system exits all channel shutdown and starts playing audio; otherwise, the outputs

are shut down (hard mute).

Table 9. System Control Register 2 (0x05)

FUNCTION

–

Mid-Z ramp disabled (1)

–

Mid-Z ramp enabled

–

Exit all-channel shutdown (normal operation)

–

Enter all-channel shutdown (hard mute) (1)

Sub-channel in AD Mode

Sub-channel in BD Mode

–

2.0 mode [2.0 BTL] (1)

–

2.1 mode [2 SE + 1 BTL]

–

ADR/FAULT pin is configured as to serve as an address input only (1)

–

ADR/FAULT pin is configured as fault output

–

Reserved (1)

(1)

Default values are in bold.

SOFT MUTE REGISTER (0x06)

Writing a 1 to any of the following bits sets the output of the respective channel to 50% duty cycle (soft mute).

Table 10. Soft Mute Register (0x06)

FUNCTION

–

Reserved (1)

–

Soft unmute channel 3 (1)

–

Soft mute channel 3

–

Soft unmute channel 2 (1)

–

Soft mute channel 2

–

Soft unmute channel 1 (1)

–

Soft mute channel 1

(1)

Default values are in bold.

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