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L6759D データシート(PDF) 18 Page - STMicroelectronics

部品番号 L6759D
部品情報  Fully configurable through PMBus
PDF  51 Pages
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メーカー  STMICROELECTRONICS [STMicroelectronics]
ホームページ  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

L6759D データシート(HTML) 18 Page - STMicroelectronics

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Device configuration and pin-strapping tables
L6759D
18/51
Doc ID 023240 Rev 1
4.2
Programming HiZ level
The L6759D is able to manage different levels for HiZ on PWMx guaranteeing flexibility in
driving different external drivers as well as DrMOS ICs.
Once VCC5, VDRV, and VIN voltages are above the respective UVLO (undervoltage
lockout) thresholds (see Figure 6), the device uses PWM1 and PWM2 to detect the
driver/DrMOS connected in order to program the suitable Hiz level of PWMx signals. During
regulation, the Hiz level is used to force the external MOSFETs into high impedance state.
●
PWM1 sources a constant 10
µA current, if its voltage results higher than 2.8 V, the HiZ
level used during the regulation is 1.4 V, if lower, PWM2 information is used.
●
PWM2 is kept in HiZ, if its voltage results higher than 2 V, the HiZ level used during the
regulation is 2 V, if lower, 1.6 V.
An external resistor divider can be placed on PWM1 and PWM2 to force the detection of the
correct HiZ level. They must be designed considering the external driver/DrMOS selected
and the HiZ level requested.
Table 6.
Pin-strapping (1)
Rdown
[k
Ω]
Rup
[k
Ω]
IMAX
ADDR
IMAX [A] (2)
JMode
VBOOT
SVI ADDR
(3)
VFDE
DPM12
DPM23
Droop
core
10
1.5
ON
1.500 V
0100b
OFF
12 A
24 A
ON
10
2.7
1.350 V
OFF
22
6.8
OFF
1.500 V
10 A
20 A
ON
10
3.6
1.350 V
OFF
27
11
ON
1.500 V
8 A
18 A
ON
12
5.6
1.350 V
OFF
82
43
OFF
1.500 V
OFF
OFF
ON
13
7.5
1.350 V
OFF
56
36
ON
1.500 V
ON
12 A
24 A
ON
18
13
1.350 V
OFF
15
12
OFF
1.500 V
10 A
20 A
ON
18
16
1.350 V
OFF
15
14.7
ON
1.500 V
8 A
18 A
ON
10
11
1.350 V
OFF
18
22
OFF
1.500 V
OFF
OFF
ON
56
75
1.350 V
OFF
N
25
56
+
⋅
N
25
48
+
⋅
N
25
40
+
⋅
N
25
32
+
⋅



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