L6759D datasheet(40/51 Pages) STMICROELECTRONICS

40 / 51 page

System control loop compensation

L6759D

40/51

Doc ID 023240 Rev 1

Figure 17.

Control loop Bode diagram and fine tuning

To obtain the desired shape, an RF-CF series network is considered for the ZF(s)

implementation. A zero at

ωF=1/RFCF is then introduced together with an integrator. This

integrator minimizes the static error while placing the zero

ωF in correspondence with the L-

C resonance which assures a simple -20 dB/dec shape of the gain.

In fact, considering the usual value for the output filter, the LC resonance results to be at a

frequency lower than the above reported zero.

The compensation network can be designed as follows:

Equation 22

Equation 23

11.1

Compensation network guidelines

The compensation network design assures the presence of a system response according to

the crossover frequency selected and to the output filter considered: it is anyway possible to

further fine-tune the compensation network modifying the bandwidth in order to get the best

response of the system, as follows (see Figure 17 ):

●

Increase RF to increase the system bandwidth accordingly

●

Decrease RF to decrease the system bandwidth accordingly

●

Increase CF to move ωF to low frequencies increasing as a consequence the system

phase margin.

Having the fastest compensation network does not guarantee that the load requirements are

satisfied: the inductor still limits the maximum dI/dt that the system can afford. In fact, when

a load transient is applied, the best that the controller can do is to “saturate” the duty cycle to

its maximum (dMAX) or minimum (0) value. The output voltage dV/dt is then limited by the

inductor charge / discharge time and by the output capacitance. In particular, the most

ZF(s)

GLOOP(s)

LC = ωF

ESR

RF[dB]

ZF(s)

GLOOP(s)

LC = ωF

ESR

RF[dB]

∆V

OSC

⋅

-------------------------------------

------

⋅

ESR

()

----------------------------------

⋅⋅

⋅

-----------------------

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