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L6759D データシート(PDF) 19 Page - STMicroelectronics

部品番号 L6759D
部品情報  Fully configurable through PMBus
PDF  51 Pages
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メーカー  STMICROELECTRONICS [STMicroelectronics]
ホームページ  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

L6759D データシート(HTML) 19 Page - STMicroelectronics

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L6759D
Device configuration and pin-strapping tables
Doc ID 023240 Rev 1
19/51
10
15
ON
1.500 V
0010b
OFF
12 A
24 A
ON
12
20
1.350 V
OFF
12
22.6
OFF
1.500 V
10 A
20 A
ON
39
82
1.350 V
OFF
47
110
ON
1.500 V
8 A
18 A
ON
10
27
1.350 V
OFF
22
68
OFF
1.500 V
OFF (4)
OFF (5)
ON
10
36
1.350 V
OFF
18
75
ON
1.500 V
ON
12 A
24 A
ON
15
75
1.350 V
OFF
10
59
OFF
1.500 V
10 A
20 A
ON
10
75
1.350 V
OFF
10
100
ON
1.500 V
8 A
18 A
ON
10
150
1.350 V
OFF
10
220
OFF
1.500 V
OFF (4)
OFF (5)
ON
10
Open
1.350 V
OFF
1.
Suggested values, divider needs to be connected between VCC5 pin and GND.
2.
N is the number of phase programmed for the multi-phase section.
3.
Address for multi-phase. Single-phase not accessible.
4.
Transition between 1Phase and 2Phase operation is set to 12 A but disabled in PS00h (minimum phase number in PS00h
is 2).
5.
Dynamic phase management disabled, IC always working at maximum possible number of phases except when in >PS00h
when transitioning between 1Phase and 2Phase at 12 A.
Table 6.
Pin-strapping (1) (continued)
Rdown
[k
Ω]
Rup
[k
Ω]
IMAX
ADDR
IMAX [A] (2)
JMode
VBOOT
SVI ADDR
(3)
VFDE
DPM12
DPM23
Droop
core
N
25
24
+
⋅
N
25
16
+
⋅
N
25
8
+
⋅
N
25
⋅
Table 7.
PMBus address definition
SVI address (see Table 6)
COMP to GND
PMBus address
0100b
4.99 k
EEh
14.99 k
EAh
24.99 k
E6h
Open
E2h
0010b
4.99 k
ECh
14.99 k
E8h
24.99 k
E4h
Open
E0h



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