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SLG46110V データシート(PDF) 1 Page - Dialog Semiconductor

部品番号 SLG46110V
部品情報  Data Communications Equipment
PDF  82 Pages
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Silego Technology, Inc.
Rev 1.06
000-0046110-106
Revised October 10, 2017
GreenPAK
Programmable Mixed Signal Matrix
SLG46110
Block Diagram
Features
• Logic & Mixed Signal Circuits
• Highly Versatile Macrocells
• 1.8 V (±5%) to 5 V (±10%) Supply
• Operating Temperature Range: -40°C to 85°C
• RoHS Compliant / Halogen-Free
• Pb-Free 12-pin STQFN: 1.6 x 1.6 x 0.55 mm, 0.4 mm pitch
Applications
• Personal Computers and Servers
• PC Peripherals
• Consumer Electronics
• Data Communications Equipment
• Handheld and Portable Electronics
Pin Configuration
GND
GPIO
GPIO
GPIO
GPIO
GPIO
2
3
4
7
8
9
10
GPI
VDD
1
STQFN-12
(Top View)
5
6
11
12
3-bit
LUT3_4 or
Pipe Delay
Vref
RC Oscillator
Pin 1
VDD
Pin 2
GPI
Pin 3
GPIO
Pin 4
GPIO
Pin 12
GPIO
Pin 11
NC
Pin 5
NC
Pin 6
GPIO
Pin 8
GPIO
Pin 7
GND
Pin 10
GPIO
Pin 9
GPIO
ACMP0
ACMP1
Look Up Tables (LUTs)
Counters/Delay Generators
CNT0
CNT3
CNT1
2-bit
LUT2_2
3-bit
LUT3_3
2-bit
LUT2_3
3-bit
LUT3_2
Combination Function Macrocells
2-bit
LUT2_0
or DFF0
2-bit
LUT2_1
or DFF1
3-bit
LUT3_1
or DFF3
3bit
LUT3_0
or DFF2
4-bit
LUT4_0
or CNT2
FILTER_0/Prog. Delay
Additional
Combination Functions
POR
Bandgap


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